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authorGabe Black <gblack@eecs.umich.edu>2006-10-26 20:24:01 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-26 20:24:01 -0400
commitd1b30102fdaa79b9937e9405aeade54a72685746 (patch)
tree9d8eab3927beda733a86c6f22357ba4579c09fe1 /src/arch/sparc
parent5024b202785b066307b5bc697ee39bccf344a100 (diff)
downloadgem5-d1b30102fdaa79b9937e9405aeade54a72685746.tar.xz
Changed the number of register windows to be more realistic.
--HG-- extra : convert_revision : ae557307f377b19bae82226dafa8b4b2654cae52
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/isa_traits.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index de54e168b..fb09121a3 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -86,7 +86,7 @@ namespace SparcISA
const int MaxPGL = 2;
// NWINDOWS - number of register windows, can be 3 to 32
- const int NWindows = 32;
+ const int NWindows = 8;
// semantically meaningful register indices
const int ZeroReg = 0; // architecturally meaningful