Merge with head.

--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b

5 files changed, 30 insertions, 185 deletions

diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index c9dbb8cf2..0552c282b 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -39,12 +39,12 @@ if env['TARGET_ISA'] == 'sparc':
     Source('miscregfile.cc')
     Source('regfile.cc')
     Source('remote_gdb.cc')
+    Source('utility.cc')
 
     if env['FULL_SYSTEM']:
         SimObject('SparcSystem.py')
         SimObject('SparcTLB.py')
 
-        Source('arguments.cc')
         Source('pagetable.cc')
         Source('stacktrace.cc')
         Source('system.cc')
diff --git a/src/arch/sparc/arguments.hh b/src/arch/sparc/arguments.hh
deleted file mode 100644
index 5596f7408..000000000
--- a/src/arch/sparc/arguments.hh
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- */
-
-#ifndef __ARCH_SPARC_ARGUMENTS_HH__
-#define __ARCH_SPARC_ARGUMENTS_HH__
-
-#include <assert.h>
-
-#include "base/refcnt.hh"
-#include "sim/host.hh"
-#include "mem/vport.hh"
-
-class ThreadContext;
-
-namespace SparcISA {
-
-class Arguments
-{
-  protected:
-    ThreadContext *tc;
-    int number;
-    uint64_t getArg(bool fp = false);
-
-  protected:
-    class Data : public RefCounted
-    {
-      public:
-        Data(){}
-        ~Data();
-
-      private:
-        std::list<char *> data;
-
-      public:
-        char *alloc(size_t size);
-    };
-
-    RefCountingPtr<Data> data;
-
-  public:
-    Arguments(ThreadContext *ctx, int n = 0)
-        : tc(ctx), number(n), data(NULL)
-        { assert(number >= 0); data = new Data;}
-    Arguments(const Arguments &args)
-        : tc(args.tc), number(args.number), data(args.data) {}
-    ~Arguments() {}
-
-    ThreadContext *getThreadContext() const { return tc; }
-
-    const Arguments &operator=(const Arguments &args) {
-        tc = args.tc;
-        number = args.number;
-        data = args.data;
-        return *this;
-    }
-
-    Arguments &operator++() {
-        ++number;
-        assert(number >= 0);
-        return *this;
-    }
-
-    Arguments operator++(int) {
-        Arguments args = *this;
-        ++number;
-        assert(number >= 0);
-        return args;
-    }
-
-    Arguments &operator--() {
-        --number;
-        assert(number >= 0);
-        return *this;
-    }
-
-    Arguments operator--(int) {
-        Arguments args = *this;
-        --number;
-        assert(number >= 0);
-        return args;
-    }
-
-    const Arguments &operator+=(int index) {
-        number += index;
-        assert(number >= 0);
-        return *this;
-    }
-
-    const Arguments &operator-=(int index) {
-        number -= index;
-        assert(number >= 0);
-        return *this;
-    }
-
-    Arguments operator[](int index) {
-        return Arguments(tc, index);
-    }
-
-    template <class T>
-    operator T() {
-        assert(sizeof(T) <= sizeof(uint64_t));
-        T data = static_cast<T>(getArg());
-        return data;
-    }
-
-    template <class T>
-    operator T *() {
-        T *buf = (T *)data->alloc(sizeof(T));
-        CopyData(tc, buf, getArg(), sizeof(T));
-        return buf;
-    }
-
-    operator char *() {
-        char *buf = data->alloc(2048);
-        CopyStringOut(tc, buf, getArg(), 2048);
-        return buf;
-    }
-};
-
-}; // namespace SparcISA
-
-#endif // __ARCH_SPARC_ARGUMENTS_HH__
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 68b2183ad..14c652606 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -1230,7 +1230,7 @@ decode OP default Unknown::unknown()
                         DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
                         fault = new TrapInstruction(lTrapNum);
                     }
-                }}, IsSerializeAfter, IsNonSpeculative);
+                }}, IsSerializeAfter, IsNonSpeculative, IsSyscall);
                 0x2: Trap::tccx({{
                     if(passesCondition(Ccr<7:4>, COND2))
                     {
@@ -1238,7 +1238,7 @@ decode OP default Unknown::unknown()
                         DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
                         fault = new TrapInstruction(lTrapNum);
                     }
-                }}, IsSerializeAfter, IsNonSpeculative);
+                }}, IsSerializeAfter, IsNonSpeculative, IsSyscall);
             }
             0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier,
                           MemWriteOp);
diff --git a/src/arch/sparc/arguments.cc b/src/arch/sparc/utility.cc
index 44adf4a15..6d4358603 100644
--- a/src/arch/sparc/arguments.cc
+++ b/src/arch/sparc/utility.cc
@@ -25,49 +25,40 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * Authors: Nathan Binkert
+ * Authors: Gabe Black
+ *          Ali Saidi
  */
 
-#include "arch/sparc/arguments.hh"
+#include "arch/sparc/utility.hh"
+#if FULL_SYSTEM
 #include "arch/sparc/vtophys.hh"
-#include "cpu/thread_context.hh"
 #include "mem/vport.hh"
+#endif
 
-using namespace SparcISA;
+namespace SparcISA {
 
-Arguments::Data::~Data()
-{
-    while (!data.empty()) {
-        delete [] data.front();
-        data.pop_front();
-    }
-}
 
-char *
-Arguments::Data::alloc(size_t size)
-{
-    char *buf = new char[size];
-    data.push_back(buf);
-    return buf;
-}
-
-uint64_t
-Arguments::getArg(bool fp)
-{
-    //The caller uses %o0-%05 for the first 6 arguments even if their floating
-    //point. Double precision floating point values take two registers/args.
-    //Quads, structs, and unions are passed as pointers. All arguments beyond
-    //the sixth are passed on the stack past the 16 word window save area,
-    //space for the struct/union return pointer, and space reserved for the
-    //first 6 arguments which the caller may use but doesn't have to.
-    if (number < 6) {
-        return tc->readIntReg(8 + number);
+//The caller uses %o0-%05 for the first 6 arguments even if their floating
+//point. Double precision floating point values take two registers/args.
+//Quads, structs, and unions are passed as pointers. All arguments beyond
+//the sixth are passed on the stack past the 16 word window save area,
+//space for the struct/union return pointer, and space reserved for the
+//first 6 arguments which the caller may use but doesn't have to.
+uint64_t getArgument(ThreadContext *tc, int number, bool fp) {
+#if FULL_SYSTEM
+    if (number < NumArgumentRegs) {
+        return tc->readIntReg(ArgumentReg[number]);
     } else {
-        Addr sp = tc->readIntReg(14);
+        Addr sp = tc->readIntReg(StackPointerReg);
         VirtualPort *vp = tc->getVirtPort(tc);
-        uint64_t arg = vp->read<uint64_t>(sp + 92 + (number-6) * sizeof(uint64_t));
+        uint64_t arg = vp->read<uint64_t>(sp + 92 +
+                            (number-NumArgumentRegs) * sizeof(uint64_t));
         tc->delVirtPort(vp);
         return arg;
     }
+#else
+    panic("getArgument() only implemented for FULL_SYSTEM\n");
+    M5_DUMMY_RETURN
+#endif
 }
-
+} //namespace SPARC_ISA
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 1458231f2..9a84a82b3 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -41,6 +41,9 @@
 namespace SparcISA
 {
 
+
+    uint64_t getArgument(ThreadContext *tc, int number, bool fp);
+
     static inline bool
     inUserMode(ThreadContext *tc)
     {