arch: Cleanup unused ISA traits constants

This patch prunes unused values, and also unifies how the values are
defined (not using an enum for ALPHA), aligning the use of int vs Addr
etc.

The patch also removes the duplication of PageBytes/PageShift and
VMPageSize/LogVMPageSize. For all ISAs the two pairs had identical
values and the latter has been removed.

2 files changed, 6 insertions, 16 deletions

diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 22d49b12e..b9253863e 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -41,8 +41,6 @@ namespace BigEndianGuest {}
 
 namespace SparcISA
 {
-const int MachineBytes = 8;
-
 // This makes sure the big endian versions of certain functions are used.
 using namespace BigEndianGuest;
 
@@ -52,21 +50,13 @@ using namespace BigEndianGuest;
 // SPARC NOP (sethi %(hi(0), g0)
 const MachInst NoopMachInst = 0x01000000;
 
-// 8K. This value is implmentation specific; and should probably
-// be somewhere else.
-const int LogVMPageSize = 13;
-const int VMPageSize = (1 << LogVMPageSize);
-
 // real address virtual mapping
 // sort of like alpha super page, but less frequently used
 const Addr SegKPMEnd  = ULL(0xfffffffc00000000);
 const Addr SegKPMBase = ULL(0xfffffac000000000);
 
-// Why does both the previous set of constants and this one exist?
-const int PageShift = 13;
-const int PageBytes = 1ULL << PageShift;
-
-const int BranchPredAddrShiftAmt = 2;
+const Addr PageShift = 13;
+const Addr PageBytes = ULL(1) << PageShift;
 
 StaticInstPtr decodeInst(ExtMachInst);
 
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 06b0d18b3..8c8be65ab 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -57,7 +57,7 @@ SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
 
     // XXX all the below need to be updated for SPARC - Ali
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set pointer for next thread stack.  Reserve 8M for main stack.
     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
@@ -166,7 +166,7 @@ Sparc32LiveProcess::initState()
     pstate.am = 1;
     tc->setMiscReg(MISCREG_PSTATE, pstate);
 
-    argsInit(32 / 8, VMPageSize);
+    argsInit(32 / 8, PageBytes);
 }
 
 void
@@ -180,7 +180,7 @@ Sparc64LiveProcess::initState()
     pstate.ie = 1;
     tc->setMiscReg(MISCREG_PSTATE, pstate);
 
-    argsInit(sizeof(IntReg), VMPageSize);
+    argsInit(sizeof(IntReg), PageBytes);
 }
 
 template<class IntType>
@@ -234,7 +234,7 @@ SparcLiveProcess::argsInit(int pageSize)
         // Bits which describe the system hardware capabilities
         auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
         // The system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::PageBytes));
         // Defined to be 100 in the kernel source.
         // Frequency at which times() increments
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));