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author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-23 21:47:03 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-23 21:47:03 -0400 |
commit | e7bbd85ae614a4d7fc49b4a8b870fe30aea82b80 (patch) | |
tree | 6de57775ca66978e14b92250fd972f5cbe1fd764 /src/arch/sparc | |
parent | 2c47413a7a4563c724d8470971d1059bdfe01c92 (diff) | |
parent | a1f92af0fb5627009b393d317c959cb6d4d692cf (diff) | |
download | gem5-e7bbd85ae614a4d7fc49b4a8b870fe30aea82b80.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec
--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
Diffstat (limited to 'src/arch/sparc')
-rw-r--r-- | src/arch/sparc/isa/decoder.isa | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 556bb4bca..68b2183ad 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -1324,8 +1324,14 @@ decode OP default Unknown::unknown() 0x05: stb({{Mem.ub = Rd.sb;}}); 0x06: sth({{Mem.uhw = Rd.shw;}}); 0x07: sttw({{ - (Mem.tuw).a = RdLow<31:0>; - (Mem.tuw).b = RdHigh<31:0>; + //This temporary needs to be here so that the parser + //will correctly identify this instruction as a store. + //It's probably either the parenthesis or referencing + //the member variable that throws confuses it. + Twin32_t temp; + temp.a = RdLow<31:0>; + temp.b = RdHigh<31:0>; + Mem.tuw = temp; }}); } format Load { @@ -1417,8 +1423,14 @@ decode OP default Unknown::unknown() 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 0x17: sttwa({{ - (Mem.tuw).a = RdLow<31:0>; - (Mem.tuw).b = RdHigh<31:0>; + //This temporary needs to be here so that the parser + //will correctly identify this instruction as a store. + //It's probably either the parenthesis or referencing + //the member variable that throws confuses it. + Twin32_t temp; + temp.a = RdLow<31:0>; + temp.b = RdHigh<31:0>; + Mem.tuw = temp; }}, {{EXT_ASI}}); } format LoadAlt { |