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authorGabe Black <gabeblack@google.com>2018-01-08 23:37:57 -0800
committerGabe Black <gabeblack@google.com>2018-01-23 20:39:17 +0000
commita4e722725c90677d555675eca616c9d0990393f1 (patch)
treeed9a8268f73742fd4b4acbaf8e8434b67dc5fed7 /src/arch/sparc
parentdb8c55dede65e07cb9ea8e95c48badd2ea24462f (diff)
downloadgem5-a4e722725c90677d555675eca616c9d0990393f1.tar.xz
tarch, mem: Abstract the data stored in the SE page tables.
Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/faults.cc25
1 files changed, 17 insertions, 8 deletions
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index 0b6a28927..0f042b4ae 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -35,6 +35,7 @@
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/process.hh"
+#include "arch/sparc/tlb.hh"
#include "arch/sparc/types.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
@@ -629,8 +630,8 @@ FastInstructionAccessMMUMiss::invoke(ThreadContext *tc,
}
Process *p = tc->getProcessPtr();
- TlbEntry *entry = p->pTable->lookup(vaddr);
- panic_if(!entry, "Tried to execute unmapped address %#x.\n", vaddr);
+ const EmulationPageTable::Entry *pte = p->pTable->lookup(vaddr);
+ panic_if(!pte, "Tried to execute unmapped address %#x.\n", vaddr);
Addr alignedvaddr = p->pTable->pageAlign(vaddr);
@@ -662,13 +663,17 @@ FastInstructionAccessMMUMiss::invoke(ThreadContext *tc,
// the logic works out to the following for the context.
int context_id = (is_real_address || trapped) ? 0 : primary_context;
+ TlbEntry entry(p->pTable->pid(), alignedvaddr, pte->paddr,
+ pte->flags & EmulationPageTable::Uncacheable,
+ pte->flags & EmulationPageTable::ReadOnly);
+
// Insert the TLB entry.
// The entry specifying whether the address is "real" is set to
// false for syscall emulation mode regardless of whether the
// address is real in preceding code. Not sure sure that this is
// correct, but also not sure if it matters at all.
dynamic_cast<TLB *>(tc->getITBPtr())->
- insert(alignedvaddr, partition_id, context_id, false, entry->pte);
+ insert(alignedvaddr, partition_id, context_id, false, entry.pte);
}
void
@@ -680,10 +685,10 @@ FastDataAccessMMUMiss::invoke(ThreadContext *tc, const StaticInstPtr &inst)
}
Process *p = tc->getProcessPtr();
- TlbEntry *entry = p->pTable->lookup(vaddr);
- if (!entry && p->fixupStackFault(vaddr))
- entry = p->pTable->lookup(vaddr);
- panic_if(!entry, "Tried to access unmapped address %#x.\n", vaddr);
+ const EmulationPageTable::Entry *pte = p->pTable->lookup(vaddr);
+ if (!pte && p->fixupStackFault(vaddr))
+ pte = p->pTable->lookup(vaddr);
+ panic_if(!pte, "Tried to access unmapped address %#x.\n", vaddr);
Addr alignedvaddr = p->pTable->pageAlign(vaddr);
@@ -745,13 +750,17 @@ FastDataAccessMMUMiss::invoke(ThreadContext *tc, const StaticInstPtr &inst)
// The partition id distinguishes between virtualized environments.
int const partition_id = 0;
+ TlbEntry entry(p->pTable->pid(), alignedvaddr, pte->paddr,
+ pte->flags & EmulationPageTable::Uncacheable,
+ pte->flags & EmulationPageTable::ReadOnly);
+
// Insert the TLB entry.
// The entry specifying whether the address is "real" is set to
// false for syscall emulation mode regardless of whether the
// address is real in preceding code. Not sure sure that this is
// correct, but also not sure if it matters at all.
dynamic_cast<TLB *>(tc->getDTBPtr())->
- insert(alignedvaddr, partition_id, context_id, false, entry->pte);
+ insert(alignedvaddr, partition_id, context_id, false, entry.pte);
}
void