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authorAli Saidi <saidi@eecs.umich.edu>2006-05-29 18:24:27 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-05-29 18:24:27 -0400
commitc0cf76c837d03c0b2cdaf0876b6c42a408ed1509 (patch)
tree664ca74a847bd30bcd82b5cde61ad2da3cb47823 /src/arch/sparc
parentdc29a7c8ae55ab1a267add8b4fe8daa35349b5c2 (diff)
downloadgem5-c0cf76c837d03c0b2cdaf0876b6c42a408ed1509.tar.xz
Create a new CpuEvent class that has a pointer to an execution context in the object and places itself on a global list so
so the events can be migrated on cpu switches. Create a new wrapper classe called CpuEventWrapper that works like the old wrapper class but calls the function with the xc parameter Use new CpuEventWrapper class from tick compare events on sparc src/arch/sparc/regfile.hh: Use new CpuEventWrapper class from tick compare events src/arch/sparc/ua2005.cc: Move definition to to a fullsystem only file, since it is. src/cpu/base.cc: On switch from one cpu to another CpuEvent::replaceExecContext() needs to be called on all (oldxc,newxc) pairs. --HG-- extra : convert_revision : eecf4540427cc0ddf75e19a3371cf32b56cba0f5
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/regfile.hh26
-rw-r--r--src/arch/sparc/ua2005.cc23
2 files changed, 37 insertions, 12 deletions
diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh
index c69b9cee8..5322ffb37 100644
--- a/src/arch/sparc/regfile.hh
+++ b/src/arch/sparc/regfile.hh
@@ -33,7 +33,7 @@
#include "arch/sparc/faults.hh"
#include "base/trace.hh"
#include "sim/byteswap.hh"
-#include "sim/eventq.hh"
+#include "cpu/cpuevent.hh"
#include "sim/host.hh"
class Checkpoint;
@@ -557,28 +557,31 @@ namespace SparcISA
// These need to check the int_dis field and if 0 then
// set appropriate bit in softint and checkinterrutps on the cpu
- void processTickCompare() { panic("tick compare not implemented\n"); }
- void processSTickCompare(){ panic("tick compare not implemented\n"); }
- void processHSTickCompare(){ panic("tick compare not implemented\n"); }
+#if FULL_SYSTEM
+ /** Process a tick compare event and generate an interrupt on the cpu if
+ * appropriate. */
+ void processTickCompare(ExecContext *xc);
+ void processSTickCompare(ExecContext *xc);
+ void processHSTickCompare(ExecContext *xc);
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processTickCompare> TickCompareEvent;
- TickCompareEvent tickCompare;
+ TickCompareEvent *tickCompare;
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processSTickCompare> STickCompareEvent;
- STickCompareEvent sTickCompare;
+ STickCompareEvent *sTickCompare;
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processHSTickCompare> HSTickCompareEvent;
- HSTickCompareEvent hSTickCompare;
+ HSTickCompareEvent *hSTickCompare;
/** Fullsystem only register version of ReadRegWithEffect() */
MiscReg readFSRegWithEffect(int miscReg, Fault &fault, ExecContext *xc);
/** Fullsystem only register version of SetRegWithEffect() */
Fault setFSRegWithEffect(int miscReg, const MiscReg &val,
ExecContext * xc);
-
+#endif
public:
void reset()
@@ -636,7 +639,6 @@ namespace SparcISA
}
MiscRegFile()
- : tickCompare(this), sTickCompare(this), hSTickCompare(this)
{
reset();
}
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 3c6cfe9c5..680e94080 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -56,6 +56,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_TICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (tickCompare == NULL)
+ tickCompare = new TickCompareEvent(this, xc);
setReg(miscReg, val);
if (tick_cmprFields.int_dis && tickCompare.scheduled())
tickCompare.deschedule();
@@ -78,6 +80,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_STICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (sTickCompare == NULL)
+ sTickCompare = new STickCompareEvent(this, xc);
sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
assert(sys != NULL);
setReg(miscReg, val);
@@ -120,6 +124,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_HSTICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (hSTickCompare == NULL)
+ hSTickCompare = new HSTickCompareEvent(this, xc);
sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
assert(sys != NULL);
setReg(miscReg, val);
@@ -195,5 +201,22 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
}
}
+void
+MiscRegFile::processTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
+
+void
+MiscRegFile::processSTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
+
+void
+MiscRegFile::processHSTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
}; // namespace SparcISA