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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2017-12-11 13:20:07 +0000
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-18 14:42:10 +0000
commit8a690593f4f4980df3fc5f4609674b1e3e62b1bc (patch)
tree37d27c1432511369c758ae034c240f313e76ba6b /src/arch/x86/SConscript
parent5cebd91336cbfbf46d6bffe9a01b7eea55e62f44 (diff)
downloadgem5-8a690593f4f4980df3fc5f4609674b1e3e62b1bc.tar.xz
arch-arm: Using explicit invalidation in TLB
When setting TLB related MiscRegs, using explicit TLB regs invalidation rather than implicit switch-case fallthrough Change-Id: Ia1a7358b6d54dda3811be1c5ce5d676f8c518c4d Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10041 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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