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authorAndreas Sandberg <andreas@sandberg.pp.se>2013-09-30 09:36:54 +0200
committerAndreas Sandberg <andreas@sandberg.pp.se>2013-09-30 09:36:54 +0200
commit30841926a3de0895152df31ce9294233db59be76 (patch)
treee2f3b6deb254ad333a9175afd51c3674775c35ad /src/arch/x86/SConscript
parentfbc1feb39ac19379983ca714f4c7fadcd9fdabf6 (diff)
downloadgem5-30841926a3de0895152df31ce9294233db59be76.tar.xz
kvm: x86: Fix segment registers to make them VMX compatible
There are cases when the segment registers in gem5 are not compatible with VMX. This changeset works around all known such issues. Specifically: * The accessed bits in CS, SS, DD, ES, FS, GS are forced to 1. * The busy bit in TR is forced to 1. * The protection level of SS is forced to the same protection level as CS. The difference /seems/ to be caused by a bug in gem5's x86 implementation.
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