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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 23:00:37 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 23:00:37 -0700 |
| commit | 504f90f76350ce14debfbfa837423144b0abdbe4 (patch) | |
| tree | 610f9dfdcd624ab6c6a5524dc5dbe3eca073b77d /src/arch/x86/SConscript | |
| parent | f4a932a6b3f5b829dd0e7cb3a596a7e054fd7144 (diff) | |
| download | gem5-504f90f76350ce14debfbfa837423144b0abdbe4.tar.xz | |
X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging.
--HG--
extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
Diffstat (limited to 'src/arch/x86/SConscript')
| -rw-r--r-- | src/arch/x86/SConscript | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript index f4a8782f2..623d61aec 100644 --- a/src/arch/x86/SConscript +++ b/src/arch/x86/SConscript @@ -88,6 +88,7 @@ Import('*') if env['TARGET_ISA'] == 'x86': Source('emulenv.cc') Source('floatregfile.cc') + Source('faults.cc') Source('insts/microfpop.cc') Source('insts/microldstop.cc') Source('insts/microop.cc') @@ -95,6 +96,7 @@ if env['TARGET_ISA'] == 'x86': Source('insts/static_inst.cc') Source('intregfile.cc') Source('miscregfile.cc') + Source('pagetable.cc') Source('predecoder.cc') Source('predecoder_tables.cc') Source('regfile.cc') |