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author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:10:42 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:10:42 -0700 |
commit | 63a6d7376b539d7da7143217f936b4ee4f984b26 (patch) | |
tree | 66c8622dbf944dea09a8146f03573d4a803576ee /src/arch/x86/SConscript | |
parent | 304e4c932af494503ead9395eb08dc8fed1efa9f (diff) | |
download | gem5-63a6d7376b539d7da7143217f936b4ee4f984b26.tar.xz |
X86: Make initCPU and startupCPU do something basic.
--HG--
extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
Diffstat (limited to 'src/arch/x86/SConscript')
-rw-r--r-- | src/arch/x86/SConscript | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript index 2a14943b0..6d7984147 100644 --- a/src/arch/x86/SConscript +++ b/src/arch/x86/SConscript @@ -102,6 +102,7 @@ if env['TARGET_ISA'] == 'x86': Source('regfile.cc') Source('remote_gdb.cc') Source('tlb.cc') + Source('utility.cc') SimObject('X86TLB.py') @@ -111,7 +112,6 @@ if env['TARGET_ISA'] == 'x86': # Full-system sources Source('system.cc') Source('stacktrace.cc') - Source('utility.cc') Source('vtophys.cc') else: Source('process.cc') |