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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 09:09:56 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 09:09:56 -0700
commitd9f9c967fbe651e09d444e460a9b1c5a450b1cd2 (patch)
treeba705f0a9f18e5c96fbec3b4f3691761235be7e2 /src/arch/x86/X86LocalApic.py
parentc4f1cc3b482311f878be44259125c9a5b90c0569 (diff)
downloadgem5-d9f9c967fbe651e09d444e460a9b1c5a450b1cd2.tar.xz
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
Diffstat (limited to 'src/arch/x86/X86LocalApic.py')
-rw-r--r--src/arch/x86/X86LocalApic.py35
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diff --git a/src/arch/x86/X86LocalApic.py b/src/arch/x86/X86LocalApic.py
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+# Copyright (c) 2008 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from Device import BasicPioDevice
+
+class X86LocalApic(BasicPioDevice):
+ type = 'X86LocalApic'
+ cxx_class = 'X86ISA::Interrupts'
+ pio_latency = Param.Latency('1ns', 'Programmed IO latency in simticks')