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authorGabe Black <gabeblack@google.com>2019-09-11 16:45:41 -0700
committerGabe Black <gabeblack@google.com>2019-10-18 21:50:26 +0000
commitc75d185d8ada4345ac3323b6603fedc4a79c94cc (patch)
tree5ad202d1fd8ffad1d46563076ca03e49225e46c1 /src/arch/x86/X86LocalApic.py
parentcb1d9d5774b04d6acb6fc3cf27f2bab870f69fc2 (diff)
downloadgem5-c75d185d8ada4345ac3323b6603fedc4a79c94cc.tar.xz
x86: Turn the local APIC Interrupts class into a SimObject.
It will no longer be a PioDevice or a ClockedObject, but will carry forward the little bits and pieces of those classes that it was using. Those are a PIO port for memory mapped register accesses, and a clock domain parameter for setting the apic tick frequency. This brings the x86 Interrupts class in line with the Interrupts of the other ISAs so that they can inherit from a standard base class. Change-Id: I6b25fa21911b39a756e0cf9408c5489a81d6ca56 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20829 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/x86/X86LocalApic.py')
-rw-r--r--src/arch/x86/X86LocalApic.py11
1 files changed, 7 insertions, 4 deletions
diff --git a/src/arch/x86/X86LocalApic.py b/src/arch/x86/X86LocalApic.py
index 456409a62..914f29766 100644
--- a/src/arch/x86/X86LocalApic.py
+++ b/src/arch/x86/X86LocalApic.py
@@ -42,10 +42,10 @@ from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *
-from m5.objects.Device import PioDevice
from m5.objects.ClockDomain import DerivedClockDomain
+from m5.SimObject import SimObject
-class X86LocalApic(PioDevice):
+class X86LocalApic(SimObject):
type = 'X86LocalApic'
cxx_class = 'X86ISA::Interrupts'
cxx_header = 'arch/x86/interrupts.hh'
@@ -53,6 +53,8 @@ class X86LocalApic(PioDevice):
int_slave = SlavePort("Port for receiving interrupt messages")
int_latency = Param.Latency('1ns', \
"Latency for an interrupt to propagate through this device.")
+ pio = SlavePort("Programmed I/O port")
+ system = Param.System(Parent.any, "System this device is part of")
pio_latency = Param.Latency('100ns', 'Programmed IO latency')
@@ -60,5 +62,6 @@ class X86LocalApic(PioDevice):
# which we assume is 1/16th the rate of the CPU clock. I don't think this
# is a hard rule, but seems to be true in practice. This can be overriden
# in configs that use it.
- clk_domain = DerivedClockDomain(
- clk_domain=Parent.clk_domain, clk_divider=16)
+ clk_domain = Param.DerivedClockDomain(
+ DerivedClockDomain(clk_domain=Parent.clk_domain, clk_divider=16),
+ "The clock for the local APIC. Should not be modified.")