summaryrefslogtreecommitdiff
path: root/src/arch/x86/X86TLB.py
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-11-12 14:38:31 -0800
committerGabe Black <gblack@eecs.umich.edu>2007-11-12 14:38:31 -0800
commitfce45baf178b43c2ea1476967fba3766e9b2ea9d (patch)
tree1aa3ba357950f9a18e2d7a7e6fd4be8c8d0e5d91 /src/arch/x86/X86TLB.py
parentf17f3d20be08d25f176138691a29897df54e5cc0 (diff)
downloadgem5-fce45baf178b43c2ea1476967fba3766e9b2ea9d.tar.xz
X86: Work on the page table walker, TLB, and related faults.
--HG-- extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
Diffstat (limited to 'src/arch/x86/X86TLB.py')
-rw-r--r--src/arch/x86/X86TLB.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/X86TLB.py b/src/arch/x86/X86TLB.py
index 2d562ba9a..5c174be59 100644
--- a/src/arch/x86/X86TLB.py
+++ b/src/arch/x86/X86TLB.py
@@ -55,6 +55,7 @@
from MemObject import MemObject
from m5.params import *
+from m5.proxy import *
class X86TLB(MemObject):
type = 'X86TLB'