Merge ARM into the head. ARM will compile but may not actually work.

13 files changed, 2559 insertions, 0 deletions

diff --git a/src/arch/x86/bios/ACPI.py b/src/arch/x86/bios/ACPI.py
new file mode 100644
index 000000000..6f7cae946
--- /dev/null
+++ b/src/arch/x86/bios/ACPI.py
@@ -0,0 +1,99 @@
+# Copyright (c) 2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use of this software in source and binary forms,
+# with or without modification, are permitted provided that the
+# following conditions are met:
+#
+# The software must be used only for Non-Commercial Use which means any
+# use which is NOT directed to receiving any direct monetary
+# compensation for, or commercial advantage from such use.  Illustrative
+# examples of non-commercial use are academic research, personal study,
+# teaching, education and corporate research & development.
+# Illustrative examples of commercial use are distributing products for
+# commercial advantage and providing services using the software for
+# commercial advantage.
+#
+# If you wish to use this software or functionality therein that may be
+# covered by patents for commercial use, please contact:
+#     Director of Intellectual Property Licensing
+#     Office of Strategy and Technology
+#     Hewlett-Packard Company
+#     1501 Page Mill Road
+#     Palo Alto, California  94304
+#
+# Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.  Redistributions
+# in binary form must reproduce the above copyright notice, this list of
+# conditions and the following disclaimer in the documentation and/or
+# other materials provided with the distribution.  Neither the name of
+# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.  No right of
+# sublicense is granted herewith.  Derivatives of the software and
+# output created using the software may be prepared, but only for
+# Non-Commercial Uses.  Derivatives of the software may be shared with
+# others provided: (i) the others agree to abide by the list of
+# conditions herein which includes the Non-Commercial Use restrictions;
+# and (ii) such Derivatives of the software include the above copyright
+# notice to acknowledge the contribution from this software where
+# applicable, this list of conditions and the disclaimer below.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.SimObject import SimObject
+
+# ACPI description table header. Subclasses contain and handle the actual
+# contents as appropriate for that type of table.
+class X86ACPISysDescTable(SimObject):
+    type = 'X86ACPISysDescTable'
+    cxx_class = 'X86ISA::ACPI::SysDescTable'
+    abstract = True
+
+    oem_id = Param.String('', 'string identifying the oem')
+    oem_table_id = Param.String('', 'oem table ID')
+    oem_revision = Param.UInt32(0, 'oem revision number for the table')
+
+    creator_id = Param.String('',
+            'string identifying the generator of the table')
+    creator_revision = Param.UInt32(0,
+            'revision number for the creator of the table')
+
+class X86ACPIRSDT(X86ACPISysDescTable):
+    type = 'X86ACPIRSDT'
+    cxx_class = 'X86ISA::ACPI::RSDT'
+
+    entries = VectorParam.X86ACPISysDescTable([], 'system description tables')
+
+class X86ACPIXSDT(X86ACPISysDescTable):
+    type = 'X86ACPIXSDT'
+    cxx_class = 'X86ISA::ACPI::XSDT'
+
+    entries = VectorParam.X86ACPISysDescTable([], 'system description tables')
+
+# Root System Description Pointer Structure
+class X86ACPIRSDP(SimObject):
+    type = 'X86ACPIRSDP'
+    cxx_class = 'X86ISA::ACPI::RSDP'
+
+    oem_id = Param.String('', 'string identifying the oem')
+    # Because 0 encodes ACPI 1.0, 2 encodes ACPI 3.0, the version implemented
+    # here.
+    revision = Param.UInt8(2, 'revision of ACPI being used, zero indexed')
+
+    rsdt = Param.X86ACPIRSDT(NULL, 'root system description table')
+    xsdt = Param.X86ACPIXSDT(X86ACPIXSDT(),
+            'extended system description table')
diff --git a/src/arch/x86/bios/E820.py b/src/arch/x86/bios/E820.py
new file mode 100644
index 000000000..288c253fb
--- /dev/null
+++ b/src/arch/x86/bios/E820.py
@@ -0,0 +1,71 @@
+# Copyright (c) 2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use of this software in source and binary forms,
+# with or without modification, are permitted provided that the
+# following conditions are met:
+#
+# The software must be used only for Non-Commercial Use which means any
+# use which is NOT directed to receiving any direct monetary
+# compensation for, or commercial advantage from such use.  Illustrative
+# examples of non-commercial use are academic research, personal study,
+# teaching, education and corporate research & development.
+# Illustrative examples of commercial use are distributing products for
+# commercial advantage and providing services using the software for
+# commercial advantage.
+#
+# If you wish to use this software or functionality therein that may be
+# covered by patents for commercial use, please contact:
+#     Director of Intellectual Property Licensing
+#     Office of Strategy and Technology
+#     Hewlett-Packard Company
+#     1501 Page Mill Road
+#     Palo Alto, California  94304
+#
+# Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.  Redistributions
+# in binary form must reproduce the above copyright notice, this list of
+# conditions and the following disclaimer in the documentation and/or
+# other materials provided with the distribution.  Neither the name of
+# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.  No right of
+# sublicense is granted herewith.  Derivatives of the software and
+# output created using the software may be prepared, but only for
+# Non-Commercial Uses.  Derivatives of the software may be shared with
+# others provided: (i) the others agree to abide by the list of
+# conditions herein which includes the Non-Commercial Use restrictions;
+# and (ii) such Derivatives of the software include the above copyright
+# notice to acknowledge the contribution from this software where
+# applicable, this list of conditions and the disclaimer below.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.SimObject import SimObject
+
+class X86E820Entry(SimObject):
+    type = 'X86E820Entry'
+    cxx_class = 'X86ISA::E820Entry'
+
+    addr = Param.Addr(0, 'address of the beginning of the region')
+    size = Param.MemorySize('0B', 'size of the region')
+    range_type = Param.UInt64('type of the region')
+
+class X86E820Table(SimObject):
+    type = 'X86E820Table'
+    cxx_class = 'X86ISA::E820Table'
+
+    entries = VectorParam.X86E820Entry([], 'entries for the e820 table')
diff --git a/src/arch/x86/bios/IntelMP.py b/src/arch/x86/bios/IntelMP.py
new file mode 100644
index 000000000..04e79b6ac
--- /dev/null
+++ b/src/arch/x86/bios/IntelMP.py
@@ -0,0 +1,242 @@
+# Copyright (c) 2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use of this software in source and binary forms,
+# with or without modification, are permitted provided that the
+# following conditions are met:
+#
+# The software must be used only for Non-Commercial Use which means any
+# use which is NOT directed to receiving any direct monetary
+# compensation for, or commercial advantage from such use.  Illustrative
+# examples of non-commercial use are academic research, personal study,
+# teaching, education and corporate research & development.
+# Illustrative examples of commercial use are distributing products for
+# commercial advantage and providing services using the software for
+# commercial advantage.
+#
+# If you wish to use this software or functionality therein that may be
+# covered by patents for commercial use, please contact:
+#     Director of Intellectual Property Licensing
+#     Office of Strategy and Technology
+#     Hewlett-Packard Company
+#     1501 Page Mill Road
+#     Palo Alto, California  94304
+#
+# Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.  Redistributions
+# in binary form must reproduce the above copyright notice, this list of
+# conditions and the following disclaimer in the documentation and/or
+# other materials provided with the distribution.  Neither the name of
+# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.  No right of
+# sublicense is granted herewith.  Derivatives of the software and
+# output created using the software may be prepared, but only for
+# Non-Commercial Uses.  Derivatives of the software may be shared with
+# others provided: (i) the others agree to abide by the list of
+# conditions herein which includes the Non-Commercial Use restrictions;
+# and (ii) such Derivatives of the software include the above copyright
+# notice to acknowledge the contribution from this software where
+# applicable, this list of conditions and the disclaimer below.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.SimObject import SimObject
+
+class X86IntelMPFloatingPointer(SimObject):
+    type = 'X86IntelMPFloatingPointer'
+    cxx_class = 'X86ISA::IntelMP::FloatingPointer'
+
+    # The minor revision of the spec to support. The major version is assumed
+    # to be 1 in accordance with the spec.
+    spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
+    # If no default configuration is used, set this to 0.
+    default_config = Param.UInt8(0, 'which default configuration to use')
+    imcr_present = Param.Bool(True,
+            'whether the IMCR register is present in the APIC')
+
+class X86IntelMPConfigTable(SimObject):
+    type = 'X86IntelMPConfigTable'
+    cxx_class = 'X86ISA::IntelMP::ConfigTable'
+
+    spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
+    oem_id = Param.String("", 'system manufacturer')
+    product_id = Param.String("", 'product family')
+    oem_table_addr = Param.UInt32(0,
+            'pointer to the optional oem configuration table')
+    oem_table_size = Param.UInt16(0, 'size of the oem configuration table')
+    local_apic = Param.UInt32(0xFEE00000, 'address of the local APIC')
+
+    base_entries = VectorParam.X86IntelMPBaseConfigEntry([],
+            'base configuration table entries')
+
+    ext_entries = VectorParam.X86IntelMPExtConfigEntry([],
+            'extended configuration table entries')
+
+    def add_entry(self, entry):
+        if isinstance(entry, X86IntelMPBaseConfigEntry):
+            self.base_entries.append(entry)
+        elif isinstance(entry, X86IntelMPExtConfigEntry):
+            self.ext_entries.append(entry)
+        else:
+            panic("Don't know what type of Intel MP entry %s is." \
+                    % entry.__class__.__name__)
+
+class X86IntelMPBaseConfigEntry(SimObject):
+    type = 'X86IntelMPBaseConfigEntry'
+    cxx_class = 'X86ISA::IntelMP::BaseConfigEntry'
+    abstract = True
+
+class X86IntelMPExtConfigEntry(SimObject):
+    type = 'X86IntelMPExtConfigEntry'
+    cxx_class = 'X86ISA::IntelMP::ExtConfigEntry'
+    abstract = True
+
+class X86IntelMPProcessor(X86IntelMPBaseConfigEntry):
+    type = 'X86IntelMPProcessor'
+    cxx_class = 'X86ISA::IntelMP::Processor'
+
+    local_apic_id = Param.UInt8(0, 'local APIC id')
+    local_apic_version = Param.UInt8(0,
+            'bits 0-7 of the local APIC version register')
+    enable = Param.Bool(True, 'if this processor is usable')
+    bootstrap = Param.Bool(False, 'if this is the bootstrap processor')
+
+    stepping = Param.UInt8(0, 'Processor stepping')
+    model = Param.UInt8(0, 'Processor model')
+    family = Param.UInt8(0, 'Processor family')
+
+    feature_flags = Param.UInt32(0, 'flags returned by the CPUID instruction')
+
+class X86IntelMPBus(X86IntelMPBaseConfigEntry):
+    type = 'X86IntelMPBus'
+    cxx_class = 'X86ISA::IntelMP::Bus'
+
+    bus_id = Param.UInt8(0, 'bus id assigned by the bios')
+    bus_type = Param.String("", 'string that identify the bus type')
+    # Legal values for bus_type are:
+    #
+    # "CBUS", "CBUSII", "EISA", "FUTURE", "INTERN", "ISA", "MBI", "MBII",
+    # "MCA", "MPI", "MPSA", "NUBUS", "PCI", "PCMCIA", "TC", "VL", "VME",
+    # "XPRESS"
+
+class X86IntelMPIOAPIC(X86IntelMPBaseConfigEntry):
+    type = 'X86IntelMPIOAPIC'
+    cxx_class = 'X86ISA::IntelMP::IOAPIC'
+
+    id = Param.UInt8(0, 'id of this APIC')
+    version = Param.UInt8(0, 'bits 0-7 of the version register')
+
+    enable = Param.Bool(True, 'if this APIC is usable')
+
+    address = Param.UInt32(0xfec00000, 'address of this APIC')
+
+class X86IntelMPInterruptType(Enum):
+    map = {'INT' : 0,
+           'NMI' : 1,
+           'SMI' : 2,
+           'ExtInt' : 3
+    }
+
+class X86IntelMPPolarity(Enum):
+    map = {'ConformPolarity' : 0,
+           'ActiveHigh' : 1,
+           'ActiveLow' : 3
+    }
+
+class X86IntelMPTriggerMode(Enum):
+    map = {'ConformTrigger' : 0,
+           'EdgeTrigger' : 1,
+           'LevelTrigger' : 3
+    }
+
+class X86IntelMPIOIntAssignment(X86IntelMPBaseConfigEntry):
+    type = 'X86IntelMPIOIntAssignment'
+    cxx_class = 'X86ISA::IntelMP::IOIntAssignment'
+
+    interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
+
+    polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
+    trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
+
+    source_bus_id = Param.UInt8(0,
+            'id of the bus from which the interrupt signal comes')
+    source_bus_irq = Param.UInt8(0,
+            'which interrupt signal from the source bus')
+
+    dest_io_apic_id = Param.UInt8(0,
+            'id of the IO APIC the interrupt is going to')
+    dest_io_apic_intin = Param.UInt8(0,
+            'the INTIN pin on the IO APIC the interrupt is connected to')
+
+class X86IntelMPLocalIntAssignment(X86IntelMPBaseConfigEntry):
+    type = 'X86IntelMPLocalIntAssignment'
+    cxx_class = 'X86ISA::IntelMP::LocalIntAssignment'
+
+    interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
+
+    polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
+    trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
+
+    source_bus_id = Param.UInt8(0,
+            'id of the bus from which the interrupt signal comes')
+    source_bus_irq = Param.UInt8(0,
+            'which interrupt signal from the source bus')
+
+    dest_local_apic_id = Param.UInt8(0,
+            'id of the local APIC the interrupt is going to')
+    dest_local_apic_intin = Param.UInt8(0,
+            'the INTIN pin on the local APIC the interrupt is connected to')
+
+class X86IntelMPAddressType(Enum):
+    map = {"IOAddress" : 0,
+           "MemoryAddress" : 1,
+           "PrefetchAddress" : 2
+    }
+
+class X86IntelMPAddrSpaceMapping(X86IntelMPExtConfigEntry):
+    type = 'X86IntelMPAddrSpaceMapping'
+    cxx_class = 'X86ISA::IntelMP::AddrSpaceMapping'
+
+    bus_id = Param.UInt8(0, 'id of the bus the address space is mapped to')
+    address_type = Param.X86IntelMPAddressType('IOAddress',
+            'address type used to access bus')
+    address = Param.Addr(0, 'starting address of the mapping')
+    length = Param.UInt64(0, 'length of mapping in bytes')
+
+class X86IntelMPBusHierarchy(X86IntelMPExtConfigEntry):
+    type = 'X86IntelMPBusHierarchy'
+    cxx_class = 'X86ISA::IntelMP::BusHierarchy'
+
+    bus_id = Param.UInt8(0, 'id of the bus being described')
+    subtractive_decode = Param.Bool(False,
+            'whether this bus contains all addresses not used by its children')
+    parent_bus = Param.UInt8(0, 'bus id of this busses parent')
+
+class X86IntelMPRangeList(Enum):
+    map = {"ISACompatible" : 0,
+           "VGACompatible" : 1
+    }
+
+class X86IntelMPCompatAddrSpaceMod(X86IntelMPExtConfigEntry):
+    type = 'X86IntelMPCompatAddrSpaceMod'
+    cxx_class = 'X86ISA::IntelMP::CompatAddrSpaceMod'
+
+    bus_id = Param.UInt8(0, 'id of the bus being described')
+    add = Param.Bool(False,
+            'if the range should be added to the original mapping')
+    range_list = Param.X86IntelMPRangeList('ISACompatible',
+            'which predefined range of addresses to use')
diff --git a/src/arch/x86/bios/SConscript b/src/arch/x86/bios/SConscript
new file mode 100644
index 000000000..912d6599c
--- /dev/null
+++ b/src/arch/x86/bios/SConscript
@@ -0,0 +1,77 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use of this software in source and binary forms,
+# with or without modification, are permitted provided that the
+# following conditions are met:
+#
+# The software must be used only for Non-Commercial Use which means any
+# use which is NOT directed to receiving any direct monetary
+# compensation for, or commercial advantage from such use.  Illustrative
+# examples of non-commercial use are academic research, personal study,
+# teaching, education and corporate research & development.
+# Illustrative examples of commercial use are distributing products for
+# commercial advantage and providing services using the software for
+# commercial advantage.
+#
+# If you wish to use this software or functionality therein that may be
+# covered by patents for commercial use, please contact:
+#     Director of Intellectual Property Licensing
+#     Office of Strategy and Technology
+#     Hewlett-Packard Company
+#     1501 Page Mill Road
+#     Palo Alto, California  94304
+#
+# Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.  Redistributions
+# in binary form must reproduce the above copyright notice, this list of
+# conditions and the following disclaimer in the documentation and/or
+# other materials provided with the distribution.  Neither the name of
+# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.  No right of
+# sublicense is granted herewith.  Derivatives of the software and
+# output created using the software may be prepared, but only for
+# Non-Commercial Uses.  Derivatives of the software may be shared with
+# others provided: (i) the others agree to abide by the list of
+# conditions herein which includes the Non-Commercial Use restrictions;
+# and (ii) such Derivatives of the software include the above copyright
+# notice to acknowledge the contribution from this software where
+# applicable, this list of conditions and the disclaimer below.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+Import('*')
+
+if env['TARGET_ISA'] == 'x86':
+    if env['FULL_SYSTEM']:
+        # The table generated by the bootloader using the BIOS and passed to
+        # the operating system which maps out physical memory.
+        SimObject('E820.py')
+        Source('e820.cc')
+
+        # The DMI tables.
+        SimObject('SMBios.py')
+	Source('smbios.cc')
+
+        # Intel Multiprocessor Specification Configuration Table
+        SimObject('IntelMP.py')
+        Source('intelmp.cc')
+
+        # ACPI system description tables
+	SimObject('ACPI.py')
+        Source('acpi.cc')
diff --git a/src/arch/x86/bios/SMBios.py b/src/arch/x86/bios/SMBios.py
new file mode 100644
index 000000000..4947b2854
--- /dev/null
+++ b/src/arch/x86/bios/SMBios.py
@@ -0,0 +1,140 @@
+# Copyright (c) 2008 The Hewlett-Packard Development Company
+# All rights reserved.
+#
+# Redistribution and use of this software in source and binary forms,
+# with or without modification, are permitted provided that the
+# following conditions are met:
+#
+# The software must be used only for Non-Commercial Use which means any
+# use which is NOT directed to receiving any direct monetary
+# compensation for, or commercial advantage from such use.  Illustrative
+# examples of non-commercial use are academic research, personal study,
+# teaching, education and corporate research & development.
+# Illustrative examples of commercial use are distributing products for
+# commercial advantage and providing services using the software for
+# commercial advantage.
+#
+# If you wish to use this software or functionality therein that may be
+# covered by patents for commercial use, please contact:
+#     Director of Intellectual Property Licensing
+#     Office of Strategy and Technology
+#     Hewlett-Packard Company
+#     1501 Page Mill Road
+#     Palo Alto, California  94304
+#
+# Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.  Redistributions
+# in binary form must reproduce the above copyright notice, this list of
+# conditions and the following disclaimer in the documentation and/or
+# other materials provided with the distribution.  Neither the name of
+# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.  No right of
+# sublicense is granted herewith.  Derivatives of the software and
+# output created using the software may be prepared, but only for
+# Non-Commercial Uses.  Derivatives of the software may be shared with
+# others provided: (i) the others agree to abide by the list of
+# conditions herein which includes the Non-Commercial Use restrictions;
+# and (ii) such Derivatives of the software include the above copyright
+# notice to acknowledge the contribution from this software where
+# applicable, this list of conditions and the disclaimer below.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.SimObject import SimObject
+
+class X86SMBiosSMBiosStructure(SimObject):
+    type = 'X86SMBiosSMBiosStructure'
+    cxx_class = 'X86ISA::SMBios::SMBiosStructure'
+    abstract = True
+
+class Characteristic(Enum):
+    map = {'Unknown' : 2,
+           'Unsupported' : 3,
+           'ISA' : 4,
+           'MCA' : 5,
+           'EISA' : 6,
+           'PCI' : 7,
+           'PCMCIA' : 8,
+           'PnP' : 9,
+           'APM' : 10,
+           'Flash' : 11,
+           'Shadow' : 12,
+           'VL_Vesa' : 13,
+           'ESCD' : 14,
+           'CDBoot' : 15,
+           'SelectBoot' : 16,
+           'Socketed' : 17,
+           'PCMCIABoot' : 18,
+           'EDD' : 19,
+           'NEC9800' : 20,
+           'Toshiba' : 21,
+           'Floppy_5_25_360KB' : 22,
+           'Floppy_5_25_1_2MB' : 23,
+           'Floppy_3_5_720KB' : 24,
+           'Floppy_3_5_2_88MB' : 25,
+           'PrintScreen' : 26,
+           'Keyboard8024' : 27,
+           'Serial' : 28,
+           'Printer' : 29,
+           'CGA_Mono' : 30,
+           'NEC_PC_98' : 31
+    }
+
+class ExtCharacteristic(Enum):
+    map = {'ACPI' : 0,
+           'USBLegacy' : 1,
+           'AGP' : 2,
+           'I20Boot' : 3,
+           'LS_120Boot' : 4,
+           'ZIPBoot' : 5,
+           'FirewireBoot' : 6,
+           'SmartBattery' : 7,
+           'BootSpec' : 8,
+           'NetServiceBoot' : 9,
+           'TargetContent' : 10
+    }
+
+class X86SMBiosBiosInformation(X86SMBiosSMBiosStructure):
+    type = 'X86SMBiosBiosInformation'
+    cxx_class = 'X86ISA::SMBios::BiosInformation'
+
+    vendor = Param.String("", "vendor name string")
+    version = Param.String("", "version string")
+    starting_addr_segment = \
+        Param.UInt16(0, "segment location of bios starting address")
+    release_date = Param.String("06/08/2008", "release date")
+    rom_size = Param.UInt8(0, "rom size")
+    characteristics = VectorParam.Characteristic([],
+            "bios characteristic bit vector")
+    characteristic_ext_bytes = VectorParam.ExtCharacteristic([],
+            "extended bios characteristic bit vector")
+    major = Param.UInt8(0, "major version number")
+    minor = Param.UInt8(0, "minor version number")
+    emb_cont_firmware_major = Param.UInt8(0,
+            "embedded controller firmware major version number")
+
+    emb_cont_firmware_minor = Param.UInt8(0,
+            "embedded controller firmware minor version number")
+
+class X86SMBiosSMBiosTable(SimObject):
+    type = 'X86SMBiosSMBiosTable'
+    cxx_class = 'X86ISA::SMBios::SMBiosTable'
+
+    major_version = Param.UInt8(2, "major version number")
+    minor_version = Param.UInt8(5, "minor version number")
+
+    structures = VectorParam.X86SMBiosSMBiosStructure([], "smbios structures")
diff --git a/src/arch/x86/bios/acpi.cc b/src/arch/x86/bios/acpi.cc
new file mode 100644
index 000000000..15b3901eb
--- /dev/null
+++ b/src/arch/x86/bios/acpi.cc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/bios/acpi.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+#include "sim/sim_object.hh"
+
+#include "params/X86ACPIRSDP.hh"
+
+#include "params/X86ACPISysDescTable.hh"
+#include "params/X86ACPIRSDT.hh"
+#include "params/X86ACPIXSDT.hh"
+
+using namespace std;
+
+const char X86ISA::ACPI::RSDP::signature[] = "RSD PTR ";
+
+X86ISA::ACPI::RSDP::RSDP(Params *p) : SimObject(p), oemID(p->oem_id),
+    revision(p->revision), rsdt(p->rsdt), xsdt(p->xsdt)
+{}
+
+X86ISA::ACPI::SysDescTable::SysDescTable(Params *p,
+        const char * _signature, uint8_t _revision) : SimObject(p),
+    signature(_signature), revision(_revision),
+    oemID(p->oem_id), oemTableID(p->oem_table_id),
+    oemRevision(p->oem_revision),
+    creatorID(p->creator_id), creatorRevision(p->creator_revision)
+{}
+
+X86ISA::ACPI::RSDT::RSDT(Params *p) :
+    SysDescTable(p, "RSDT", 1), entries(p->entries)
+{}
+
+X86ISA::ACPI::XSDT::XSDT(Params *p) :
+    SysDescTable(p, "XSDT", 1), entries(p->entries)
+{}
+
+X86ISA::ACPI::RSDP *
+X86ACPIRSDPParams::create()
+{
+    return new X86ISA::ACPI::RSDP(this);
+}
+
+X86ISA::ACPI::RSDT *
+X86ACPIRSDTParams::create()
+{
+    return new X86ISA::ACPI::RSDT(this);
+}
+
+X86ISA::ACPI::XSDT *
+X86ACPIXSDTParams::create()
+{
+    return new X86ISA::ACPI::XSDT(this);
+}
diff --git a/src/arch/x86/bios/acpi.hh b/src/arch/x86/bios/acpi.hh
new file mode 100644
index 000000000..7bca17790
--- /dev/null
+++ b/src/arch/x86/bios/acpi.hh
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_X86_BIOS_ACPI_HH__
+#define __ARCH_X86_BIOS_ACPI_HH__
+
+#include "sim/host.hh"
+#include "sim/sim_object.hh"
+
+#include <vector>
+#include <string>
+
+class Port;
+
+class X86ACPIRSDPParams;
+
+class X86ACPISysDescTableParams;
+class X86ACPIRSDTParams;
+class X86ACPIXSDTParams;
+
+namespace X86ISA
+{
+
+namespace ACPI
+{
+
+class RSDT;
+class XSDT;
+class SysDescTable;
+
+class RSDP : public SimObject
+{
+  protected:
+    typedef X86ACPIRSDPParams Params;
+
+    static const char signature[];
+
+    std::string oemID;
+    uint8_t revision;
+
+    RSDT * rsdt;
+    XSDT * xsdt;
+
+  public:
+    RSDP(Params *p);
+};
+
+class SysDescTable : public SimObject
+{
+  protected:
+    typedef X86ACPISysDescTableParams Params;
+
+    const char * signature;
+    uint8_t revision;
+
+    std::string oemID;
+    std::string oemTableID;
+    uint32_t oemRevision;
+
+    std::string creatorID;
+    uint32_t creatorRevision;
+
+  public:
+    SysDescTable(Params *p, const char * _signature, uint8_t _revision);
+};
+
+class RSDT : public SysDescTable
+{
+  protected:
+    typedef X86ACPIRSDTParams Params;
+
+    std::vector<SysDescTable *> entries;
+
+  public:
+    RSDT(Params *p);
+};
+
+class XSDT : public SysDescTable
+{
+  protected:
+    typedef X86ACPIXSDTParams Params;
+
+    std::vector<SysDescTable *> entries;
+
+  public:
+    XSDT(Params *p);
+};
+
+} // namespace ACPI
+
+} // namespace X86ISA
+
+#endif // __ARCH_X86_BIOS_E820_HH__
diff --git a/src/arch/x86/bios/e820.cc b/src/arch/x86/bios/e820.cc
new file mode 100644
index 000000000..47adb703a
--- /dev/null
+++ b/src/arch/x86/bios/e820.cc
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/bios/e820.hh"
+#include "arch/x86/isa_traits.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+
+using namespace std;
+using namespace X86ISA;
+
+template<class T>
+void writeVal(T val, Port * port, Addr &addr)
+{
+    T guestVal = htog(val);
+    port->writeBlob(addr, (uint8_t *)&guestVal, sizeof(T));
+    addr += sizeof(T);
+}
+
+void X86ISA::E820Table::writeTo(Port * port, Addr countAddr, Addr addr)
+{
+    uint8_t e820Nr = entries.size();
+
+    // Make sure the number of entries isn't bigger than what the kernel
+    // would be capable of handling.
+    assert(e820Nr <= 128);
+
+    uint8_t guestE820Nr = htog(e820Nr);
+
+    port->writeBlob(countAddr, (uint8_t *)&guestE820Nr, sizeof(guestE820Nr));
+
+    for (int i = 0; i < e820Nr; i++) {
+        writeVal(entries[i]->addr, port, addr);
+        writeVal(entries[i]->size, port, addr);
+        writeVal(entries[i]->type, port, addr);
+    }
+}
+
+E820Table *
+X86E820TableParams::create()
+{
+    return new E820Table(this);
+}
+
+E820Entry *
+X86E820EntryParams::create()
+{
+    return new E820Entry(this);
+}
diff --git a/src/arch/x86/bios/e820.hh b/src/arch/x86/bios/e820.hh
new file mode 100644
index 000000000..da738343b
--- /dev/null
+++ b/src/arch/x86/bios/e820.hh
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_X86_BIOS_E820_HH__
+#define __ARCH_X86_BIOS_E820_HH__
+
+#include "params/X86E820Entry.hh"
+#include "params/X86E820Table.hh"
+#include "sim/host.hh"
+#include "sim/sim_object.hh"
+
+#include <vector>
+
+class Port;
+
+namespace X86ISA
+{
+    class E820Entry : public SimObject
+    {
+      public:
+        Addr addr;
+        Addr size;
+        uint32_t type;
+
+      public:
+        typedef X86E820EntryParams Params;
+        E820Entry(Params *p) :
+            SimObject(p), addr(p->addr), size(p->size), type(p->range_type)
+        {}
+    };
+
+    class E820Table : public SimObject
+    {
+      public:
+        std::vector<E820Entry *> entries;
+
+      public:
+        typedef X86E820TableParams Params;
+        E820Table(Params *p) : SimObject(p), entries(p->entries)
+        {}
+
+        void writeTo(Port * port, Addr countAddr, Addr addr);
+    };
+};
+
+#endif // __ARCH_X86_BIOS_E820_HH__
diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc
new file mode 100644
index 000000000..2332e7a5c
--- /dev/null
+++ b/src/arch/x86/bios/intelmp.cc
@@ -0,0 +1,476 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/bios/intelmp.hh"
+#include "arch/x86/isa_traits.hh"
+#include "base/misc.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+#include "sim/host.hh"
+
+// Config entry types
+#include "params/X86IntelMPBaseConfigEntry.hh"
+#include "params/X86IntelMPExtConfigEntry.hh"
+
+// General table structures
+#include "params/X86IntelMPConfigTable.hh"
+#include "params/X86IntelMPFloatingPointer.hh"
+
+// Base entry types
+#include "params/X86IntelMPBus.hh"
+#include "params/X86IntelMPIOAPIC.hh"
+#include "params/X86IntelMPIOIntAssignment.hh"
+#include "params/X86IntelMPLocalIntAssignment.hh"
+#include "params/X86IntelMPProcessor.hh"
+
+// Extended entry types
+#include "params/X86IntelMPAddrSpaceMapping.hh"
+#include "params/X86IntelMPBusHierarchy.hh"
+#include "params/X86IntelMPCompatAddrSpaceMod.hh"
+
+using namespace std;
+
+const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_";
+
+template<class T>
+uint8_t
+writeOutField(FunctionalPort * port, Addr addr, T val)
+{
+    T guestVal = X86ISA::htog(val);
+    port->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T));
+
+    uint8_t checkSum = 0;
+    while(guestVal) {
+        checkSum += guestVal;
+        guestVal >>= 8;
+    }
+    return checkSum;
+}
+
+uint8_t
+writeOutString(FunctionalPort * port, Addr addr, string str, int length)
+{
+    char cleanedString[length + 1];
+    cleanedString[length] = 0;
+
+    if (str.length() > length) {
+        memcpy(cleanedString, str.c_str(), length);
+        warn("Intel MP configuration table string \"%s\" "
+                "will be truncated to \"%s\".\n", str, cleanedString);
+    } else {
+        memcpy(cleanedString, str.c_str(), str.length());
+        memset(cleanedString + str.length(), 0, length - str.length());
+    }
+    port->writeBlob(addr, (uint8_t *)(&cleanedString), length);
+
+    uint8_t checkSum = 0;
+    for (int i = 0; i < length; i++)
+        checkSum += cleanedString[i];
+
+    return checkSum;
+}
+
+Addr
+X86ISA::IntelMP::FloatingPointer::writeOut(FunctionalPort * port, Addr addr)
+{
+    // Make sure that either a config table is present or a default
+    // configuration was found but not both.
+    if (!tableAddr && !defaultConfig)
+        fatal("Either an MP configuration table or a default configuration "
+                "must be used.");
+    if (tableAddr && defaultConfig)
+        fatal("Both an MP configuration table and a default configuration "
+                "were set.");
+
+    uint8_t checkSum = 0;
+
+    port->writeBlob(addr, (uint8_t *)signature, 4);
+    for (int i = 0; i < 4; i++)
+        checkSum += signature[i];
+
+    checkSum += writeOutField(port, addr + 4, tableAddr);
+
+    // The length of the structure in paragraphs, aka 16 byte chunks.
+    uint8_t length = 1;
+    port->writeBlob(addr + 8, &length, 1);
+    checkSum += length;
+
+    port->writeBlob(addr + 9, &specRev, 1);
+    checkSum += specRev;
+
+    port->writeBlob(addr + 11, &defaultConfig, 1);
+    checkSum += defaultConfig;
+
+    uint32_t features2_5 = imcrPresent ? (1 << 7) : 0;
+    checkSum += writeOutField(port, addr + 12, features2_5);
+
+    checkSum = -checkSum;
+    port->writeBlob(addr + 10, &checkSum, 1);
+
+    return 16;
+}
+
+X86ISA::IntelMP::FloatingPointer::FloatingPointer(Params * p) :
+    SimObject(p), tableAddr(0), specRev(p->spec_rev),
+    defaultConfig(p->default_config), imcrPresent(p->imcr_present)
+{}
+
+X86ISA::IntelMP::FloatingPointer *
+X86IntelMPFloatingPointerParams::create()
+{
+    return new X86ISA::IntelMP::FloatingPointer(this);
+}
+
+Addr
+X86ISA::IntelMP::BaseConfigEntry::writeOut(FunctionalPort * port,
+        Addr addr, uint8_t &checkSum)
+{
+    port->writeBlob(addr, &type, 1);
+    checkSum += type;
+    return 1;
+}
+
+X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) :
+    SimObject(p), type(_type)
+{}
+
+Addr
+X86ISA::IntelMP::ExtConfigEntry::writeOut(FunctionalPort * port,
+        Addr addr, uint8_t &checkSum)
+{
+    port->writeBlob(addr, &type, 1);
+    checkSum += type;
+    port->writeBlob(addr + 1, &length, 1);
+    checkSum += length;
+    return 1;
+}
+
+X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p,
+        uint8_t _type, uint8_t _length) :
+    SimObject(p), type(_type), length(_length)
+{}
+
+const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP";
+
+Addr
+X86ISA::IntelMP::ConfigTable::writeOut(FunctionalPort * port, Addr addr)
+{
+    uint8_t checkSum = 0;
+
+    port->writeBlob(addr, (uint8_t *)signature, 4);
+    for (int i = 0; i < 4; i++)
+        checkSum += signature[i];
+
+    // Base table length goes here but will be calculated later.
+
+    port->writeBlob(addr + 6, (uint8_t *)(&specRev), 1);
+    checkSum += specRev;
+
+    // The checksum goes here but is still being calculated.
+
+    checkSum += writeOutString(port, addr + 8, oemID, 8);
+    checkSum += writeOutString(port, addr + 16, productID, 12);
+
+    checkSum += writeOutField(port, addr + 28, oemTableAddr);
+    checkSum += writeOutField(port, addr + 32, oemTableSize);
+    checkSum += writeOutField(port, addr + 34, (uint16_t)baseEntries.size());
+    checkSum += writeOutField(port, addr + 36, localApic);
+
+    uint8_t reserved = 0;
+    port->writeBlob(addr + 43, &reserved, 1);
+    checkSum += reserved;
+
+    vector<BaseConfigEntry *>::iterator baseEnt;
+    uint16_t offset = 44;
+    for (baseEnt = baseEntries.begin();
+            baseEnt != baseEntries.end(); baseEnt++) {
+        offset += (*baseEnt)->writeOut(port, addr + offset, checkSum);
+    }
+
+    // We've found the end of the base table this point.
+    checkSum += writeOutField(port, addr + 4, offset);
+
+    vector<ExtConfigEntry *>::iterator extEnt;
+    uint16_t extOffset = 0;
+    uint8_t extCheckSum = 0;
+    for (extEnt = extEntries.begin();
+            extEnt != extEntries.end(); extEnt++) {
+        extOffset += (*extEnt)->writeOut(port,
+                addr + offset + extOffset, extCheckSum);
+    }
+
+    checkSum += writeOutField(port, addr + 40, extOffset);
+    extCheckSum = -extCheckSum;
+    checkSum += writeOutField(port, addr + 42, extCheckSum);
+
+    // And now, we finally have the whole check sum completed.
+    checkSum = -checkSum;
+    writeOutField(port, addr + 7, checkSum);
+
+    return offset + extOffset;
+};
+
+X86ISA::IntelMP::ConfigTable::ConfigTable(Params * p) : SimObject(p),
+    specRev(p->spec_rev), oemID(p->oem_id), productID(p->product_id),
+    oemTableAddr(p->oem_table_addr), oemTableSize(p->oem_table_size),
+    localApic(p->local_apic),
+    baseEntries(p->base_entries), extEntries(p->ext_entries)
+{}
+
+X86ISA::IntelMP::ConfigTable *
+X86IntelMPConfigTableParams::create()
+{
+    return new X86ISA::IntelMP::ConfigTable(this);
+}
+
+Addr
+X86ISA::IntelMP::Processor::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    BaseConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 1, localApicID);
+    checkSum += writeOutField(port, addr + 2, localApicVersion);
+    checkSum += writeOutField(port, addr + 3, cpuFlags);
+    checkSum += writeOutField(port, addr + 4, cpuSignature);
+    checkSum += writeOutField(port, addr + 8, featureFlags);
+
+    uint32_t reserved = 0;
+    port->writeBlob(addr + 12, (uint8_t *)(&reserved), 4);
+    port->writeBlob(addr + 16, (uint8_t *)(&reserved), 4);
+    return 20;
+}
+
+X86ISA::IntelMP::Processor::Processor(Params * p) : BaseConfigEntry(p, 0),
+    localApicID(p->local_apic_id), localApicVersion(p->local_apic_version),
+    cpuFlags(0), cpuSignature(0), featureFlags(p->feature_flags)
+{
+    if (p->enable)
+        cpuFlags |= (1 << 0);
+    if (p->bootstrap)
+        cpuFlags |= (1 << 1);
+
+    replaceBits(cpuSignature, 0, 3, p->stepping);
+    replaceBits(cpuSignature, 4, 7, p->model);
+    replaceBits(cpuSignature, 8, 11, p->family);
+}
+
+X86ISA::IntelMP::Processor *
+X86IntelMPProcessorParams::create()
+{
+    return new X86ISA::IntelMP::Processor(this);
+}
+
+Addr
+X86ISA::IntelMP::Bus::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    BaseConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 1, busID);
+    checkSum += writeOutString(port, addr + 2, busType, 6);
+    return 8;
+}
+
+X86ISA::IntelMP::Bus::Bus(Params * p) : BaseConfigEntry(p, 1),
+    busID(p->bus_id), busType(p->bus_type)
+{}
+
+X86ISA::IntelMP::Bus *
+X86IntelMPBusParams::create()
+{
+    return new X86ISA::IntelMP::Bus(this);
+}
+
+Addr
+X86ISA::IntelMP::IOAPIC::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    BaseConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 1, id);
+    checkSum += writeOutField(port, addr + 2, version);
+    checkSum += writeOutField(port, addr + 3, flags);
+    checkSum += writeOutField(port, addr + 4, address);
+    return 8;
+}
+
+X86ISA::IntelMP::IOAPIC::IOAPIC(Params * p) : BaseConfigEntry(p, 2),
+    id(p->id), version(p->version), flags(0), address(p->address)
+{
+    if (p->enable)
+        flags |= 1;
+}
+
+X86ISA::IntelMP::IOAPIC *
+X86IntelMPIOAPICParams::create()
+{
+    return new X86ISA::IntelMP::IOAPIC(this);
+}
+
+Addr
+X86ISA::IntelMP::IntAssignment::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    BaseConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 1, interruptType);
+    checkSum += writeOutField(port, addr + 2, flags);
+    checkSum += writeOutField(port, addr + 4, sourceBusID);
+    checkSum += writeOutField(port, addr + 5, sourceBusIRQ);
+    checkSum += writeOutField(port, addr + 6, destApicID);
+    checkSum += writeOutField(port, addr + 7, destApicIntIn);
+    return 8;
+}
+
+X86ISA::IntelMP::IOIntAssignment::IOIntAssignment(Params * p) :
+    IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 3,
+            p->source_bus_id, p->source_bus_irq,
+            p->dest_io_apic_id, p->dest_io_apic_intin)
+{}
+
+X86ISA::IntelMP::IOIntAssignment *
+X86IntelMPIOIntAssignmentParams::create()
+{
+    return new X86ISA::IntelMP::IOIntAssignment(this);
+}
+
+X86ISA::IntelMP::LocalIntAssignment::LocalIntAssignment(Params * p) :
+    IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 4,
+            p->source_bus_id, p->source_bus_irq,
+            p->dest_local_apic_id, p->dest_local_apic_intin)
+{}
+
+X86ISA::IntelMP::LocalIntAssignment *
+X86IntelMPLocalIntAssignmentParams::create()
+{
+    return new X86ISA::IntelMP::LocalIntAssignment(this);
+}
+
+Addr
+X86ISA::IntelMP::AddrSpaceMapping::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    ExtConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 2, busID);
+    checkSum += writeOutField(port, addr + 3, addrType);
+    checkSum += writeOutField(port, addr + 4, addr);
+    checkSum += writeOutField(port, addr + 12, addrLength);
+    return length;
+}
+
+X86ISA::IntelMP::AddrSpaceMapping::AddrSpaceMapping(Params * p) :
+    ExtConfigEntry(p, 128, 20),
+    busID(p->bus_id), addrType(p->address_type),
+    addr(p->address), addrLength(p->length)
+{}
+
+X86ISA::IntelMP::AddrSpaceMapping *
+X86IntelMPAddrSpaceMappingParams::create()
+{
+    return new X86ISA::IntelMP::AddrSpaceMapping(this);
+}
+
+Addr
+X86ISA::IntelMP::BusHierarchy::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    ExtConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 2, busID);
+    checkSum += writeOutField(port, addr + 3, info);
+    checkSum += writeOutField(port, addr + 4, parentBus);
+
+    uint32_t reserved = 0;
+    port->writeBlob(addr + 5, (uint8_t *)(&reserved), 3);
+
+    return length;
+}
+
+X86ISA::IntelMP::BusHierarchy::BusHierarchy(Params * p) :
+    ExtConfigEntry(p, 129, 8),
+    busID(p->bus_id), info(0), parentBus(p->parent_bus)
+{
+    if (p->subtractive_decode)
+        info |= 1;
+}
+
+X86ISA::IntelMP::BusHierarchy *
+X86IntelMPBusHierarchyParams::create()
+{
+    return new X86ISA::IntelMP::BusHierarchy(this);
+}
+
+Addr
+X86ISA::IntelMP::CompatAddrSpaceMod::writeOut(
+        FunctionalPort * port, Addr addr, uint8_t &checkSum)
+{
+    ExtConfigEntry::writeOut(port, addr, checkSum);
+    checkSum += writeOutField(port, addr + 2, busID);
+    checkSum += writeOutField(port, addr + 3, mod);
+    checkSum += writeOutField(port, addr + 4, rangeList);
+    return length;
+}
+
+X86ISA::IntelMP::CompatAddrSpaceMod::CompatAddrSpaceMod(Params * p) :
+    ExtConfigEntry(p, 130, 8),
+    busID(p->bus_id), mod(0), rangeList(p->range_list)
+{
+    if (p->add)
+        mod |= 1;
+}
+
+X86ISA::IntelMP::CompatAddrSpaceMod *
+X86IntelMPCompatAddrSpaceModParams::create()
+{
+    return new X86ISA::IntelMP::CompatAddrSpaceMod(this);
+}
diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh
new file mode 100644
index 000000000..e8d1d656e
--- /dev/null
+++ b/src/arch/x86/bios/intelmp.hh
@@ -0,0 +1,330 @@
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_X86_BIOS_INTELMP_HH__
+#define __ARCH_X86_BIOS_INTELMP_HH__
+
+#include <string>
+#include <vector>
+
+#include "base/bitfield.hh"
+#include "sim/sim_object.hh"
+
+#include "enums/X86IntelMPAddressType.hh"
+#include "enums/X86IntelMPInterruptType.hh"
+#include "enums/X86IntelMPPolarity.hh"
+#include "enums/X86IntelMPRangeList.hh"
+#include "enums/X86IntelMPTriggerMode.hh"
+
+class FunctionalPort;
+
+// Config entry types
+class X86IntelMPBaseConfigEntryParams;
+class X86IntelMPExtConfigEntryParams;
+
+// General table structures
+class X86IntelMPConfigTableParams;
+class X86IntelMPFloatingPointerParams;
+
+// Base entry types
+class X86IntelMPBusParams;
+class X86IntelMPIOAPICParams;
+class X86IntelMPIOIntAssignmentParams;
+class X86IntelMPLocalIntAssignmentParams;
+class X86IntelMPProcessorParams;
+
+// Extended entry types
+class X86IntelMPAddrSpaceMappingParams;
+class X86IntelMPBusHierarchyParams;
+class X86IntelMPCompatAddrSpaceModParams;
+
+namespace X86ISA
+{
+
+namespace IntelMP
+{
+
+class FloatingPointer : public SimObject
+{
+  protected:
+    typedef X86IntelMPFloatingPointerParams Params;
+
+    uint32_t tableAddr;
+    uint8_t specRev;
+    uint8_t defaultConfig;
+    bool imcrPresent;
+
+    static const char signature[];
+
+  public:
+
+    Addr writeOut(FunctionalPort * port, Addr addr);
+
+    Addr getTableAddr()
+    {
+        return tableAddr;
+    }
+
+    void setTableAddr(Addr addr)
+    {
+        tableAddr = addr;
+    }
+
+    FloatingPointer(Params * p);
+};
+
+class BaseConfigEntry : public SimObject
+{
+  protected:
+    typedef X86IntelMPBaseConfigEntryParams Params;
+
+    uint8_t type;
+
+  public:
+
+    virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    BaseConfigEntry(Params * p, uint8_t _type);
+};
+
+class ExtConfigEntry : public SimObject
+{
+  protected:
+    typedef X86IntelMPExtConfigEntryParams Params;
+
+    uint8_t type;
+    uint8_t length;
+
+  public:
+
+    virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length);
+};
+
+class ConfigTable : public SimObject
+{
+  protected:
+    typedef X86IntelMPConfigTableParams Params;
+
+    static const char signature[];
+
+    uint8_t specRev;
+    std::string oemID;
+    std::string productID;
+    uint32_t oemTableAddr;
+    uint16_t oemTableSize;
+    uint32_t localApic;
+
+    std::vector<BaseConfigEntry *> baseEntries;
+    std::vector<ExtConfigEntry *> extEntries;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr);
+
+    ConfigTable(Params * p);
+};
+
+class Processor : public BaseConfigEntry
+{
+  protected:
+    typedef X86IntelMPProcessorParams Params;
+
+    uint8_t localApicID;
+    uint8_t localApicVersion;
+    uint8_t cpuFlags;
+    uint32_t cpuSignature;
+    uint32_t featureFlags;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    Processor(Params * p);
+};
+
+class Bus : public BaseConfigEntry
+{
+  protected:
+    typedef X86IntelMPBusParams Params;
+
+    uint8_t busID;
+    std::string busType;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    Bus(Params * p);
+};
+
+class IOAPIC : public BaseConfigEntry
+{
+  protected:
+    typedef X86IntelMPIOAPICParams Params;
+
+    uint8_t id;
+    uint8_t version;
+    uint8_t flags;
+    uint32_t address;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    IOAPIC(Params * p);
+};
+
+class IntAssignment : public BaseConfigEntry
+{
+  protected:
+    uint8_t interruptType;
+
+    uint16_t flags;
+
+    uint8_t sourceBusID;
+    uint8_t sourceBusIRQ;
+
+    uint8_t destApicID;
+    uint8_t destApicIntIn;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    IntAssignment(X86IntelMPBaseConfigEntryParams * p,
+            Enums::X86IntelMPInterruptType _interruptType,
+            Enums::X86IntelMPPolarity polarity,
+            Enums::X86IntelMPTriggerMode trigger,
+            uint8_t _type,
+            uint8_t _sourceBusID, uint8_t _sourceBusIRQ,
+            uint8_t _destApicID, uint8_t _destApicIntIn) :
+        BaseConfigEntry(p, _type),
+        interruptType(_interruptType), flags(0),
+        sourceBusID(_sourceBusID), sourceBusIRQ(_sourceBusIRQ),
+        destApicID(_destApicID), destApicIntIn(_destApicIntIn)
+    {
+        replaceBits(flags, 0, 1, polarity);
+        replaceBits(flags, 2, 3, trigger);
+    }
+};
+
+class IOIntAssignment : public IntAssignment
+{
+  protected:
+    typedef X86IntelMPIOIntAssignmentParams Params;
+
+  public:
+    IOIntAssignment(Params * p);
+};
+
+class LocalIntAssignment : public IntAssignment
+{
+  protected:
+    typedef X86IntelMPLocalIntAssignmentParams Params;
+
+  public:
+    LocalIntAssignment(Params * p);
+};
+
+class AddrSpaceMapping : public ExtConfigEntry
+{
+  protected:
+    typedef X86IntelMPAddrSpaceMappingParams Params;
+
+    uint8_t busID;
+    uint8_t addrType;
+    uint64_t addr;
+    uint64_t addrLength;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    AddrSpaceMapping(Params * p);
+};
+
+class BusHierarchy : public ExtConfigEntry
+{
+  protected:
+    typedef X86IntelMPBusHierarchyParams Params;
+
+    uint8_t busID;
+    uint8_t info;
+    uint8_t parentBus;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    BusHierarchy(Params * p);
+};
+
+class CompatAddrSpaceMod : public ExtConfigEntry
+{
+  protected:
+    typedef X86IntelMPCompatAddrSpaceModParams Params;
+
+    uint8_t busID;
+    uint8_t mod;
+    uint32_t rangeList;
+
+  public:
+    Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum);
+
+    CompatAddrSpaceMod(Params * p);
+};
+
+} //IntelMP
+
+} //X86ISA
+
+#endif
diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc
new file mode 100644
index 000000000..95ade1e4d
--- /dev/null
+++ b/src/arch/x86/bios/smbios.cc
@@ -0,0 +1,387 @@
+/*
+ * Copyright (c) 2008 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "arch/x86/bios/smbios.hh"
+#include "arch/x86/isa_traits.hh"
+#include "mem/port.hh"
+#include "params/X86SMBiosBiosInformation.hh"
+#include "params/X86SMBiosSMBiosStructure.hh"
+#include "params/X86SMBiosSMBiosTable.hh"
+#include "sim/byteswap.hh"
+#include "sim/host.hh"
+
+using namespace std;
+
+const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::formattedArea[] = {0,0,0,0,0};
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::entryPointLength = 0x1F;
+const uint8_t X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::entryPointRevision = 0;
+const char X86ISA::SMBios::SMBiosTable::
+        SMBiosHeader::IntermediateHeader::anchorString[] = "_DMI_";
+
+template <class T>
+uint64_t
+composeBitVector(T vec)
+{
+    uint64_t val = 0;
+    typename T::iterator vecIt;
+    for (vecIt = vec.begin(); vecIt != vec.end(); vecIt++) {
+        val |= (1 << (*vecIt));
+    }
+    return val;
+}
+
+uint16_t
+X86ISA::SMBios::SMBiosStructure::writeOut(FunctionalPort * port, Addr addr)
+{
+    port->writeBlob(addr, (uint8_t *)(&type), 1);
+
+    uint8_t length = getLength();
+    port->writeBlob(addr + 1, (uint8_t *)(&length), 1);
+
+    uint16_t handleGuest = X86ISA::htog(handle);
+    port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
+
+    return length + getStringLength();
+}
+
+X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) :
+    SimObject(p), type(_type), handle(0), stringFields(false)
+{}
+
+void
+X86ISA::SMBios::SMBiosStructure::writeOutStrings(
+        FunctionalPort * port, Addr addr)
+{
+    std::vector<std::string>::iterator it;
+    Addr offset = 0;
+
+    const uint8_t nullTerminator = 0;
+
+    // If there are string fields but none of them are used, that's a
+    // special case which is handled by this if.
+    if (strings.size() == 0 && stringFields) {
+        port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+        offset++;
+    } else {
+        for (it = strings.begin(); it != strings.end(); it++) {
+            port->writeBlob(addr + offset,
+                    (uint8_t *)it->c_str(), it->length() + 1);
+            offset += it->length() + 1;
+        }
+    }
+    port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
+}
+
+int
+X86ISA::SMBios::SMBiosStructure::getStringLength()
+{
+    int size = 0;
+    std::vector<std::string>::iterator it;
+
+    for (it = strings.begin(); it != strings.end(); it++) {
+        size += it->length() + 1;
+    }
+
+    return size + 1;
+}
+
+int
+X86ISA::SMBios::SMBiosStructure::addString(string & newString)
+{
+    stringFields = true;
+    // If a string is empty, treat it as not existing. The index for empty
+    // strings is 0.
+    if (newString.length() == 0)
+        return 0;
+    strings.push_back(newString);
+    return strings.size();
+}
+
+string
+X86ISA::SMBios::SMBiosStructure::readString(int n)
+{
+    assert(n > 0 && n <= strings.size());
+    return strings[n - 1];
+}
+
+void
+X86ISA::SMBios::SMBiosStructure::setString(int n, std::string & newString)
+{
+    assert(n > 0 && n <= strings.size());
+    strings[n - 1] = newString;
+}
+
+X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) :
+        SMBiosStructure(p, Type),
+        startingAddrSegment(p->starting_addr_segment),
+        romSize(p->rom_size),
+        majorVer(p->major), minorVer(p->minor),
+        embContFirmwareMajor(p->emb_cont_firmware_major),
+        embContFirmwareMinor(p->emb_cont_firmware_minor)
+    {
+        vendor = addString(p->vendor);
+        version = addString(p->version);
+        releaseDate = addString(p->release_date);
+
+        characteristics = composeBitVector(p->characteristics);
+        characteristicExtBytes =
+            composeBitVector(p->characteristic_ext_bytes);
+    }
+
+uint16_t
+X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr)
+{
+    uint8_t size = SMBiosStructure::writeOut(port, addr);
+
+    port->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
+    port->writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
+
+    uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
+    port->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
+
+    port->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
+    port->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
+
+    uint64_t characteristicsGuest = X86ISA::htog(characteristics);
+    port->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
+
+    uint16_t characteristicExtBytesGuest =
+        X86ISA::htog(characteristicExtBytes);
+    port->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
+
+    port->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
+    port->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
+    port->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
+    port->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
+
+    writeOutStrings(port, addr + getLength());
+
+    return size;
+}
+
+X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) :
+    SimObject(p), structures(p->structures)
+{
+    smbiosHeader.majorVersion = p->major_version;
+    smbiosHeader.minorVersion = p->minor_version;
+    assert(p->major_version <= 9);
+    assert(p->minor_version <= 9);
+    smbiosHeader.intermediateHeader.smbiosBCDRevision =
+        (p->major_version << 4) | p->minor_version;
+}
+
+void
+X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr,
+        Addr &headerSize, Addr &structSize)
+{
+    headerSize = 0x1F;
+
+    /*
+     * The main header
+     */
+    uint8_t mainChecksum = 0;
+
+    port->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
+    for (int i = 0; i < 4; i++)
+        mainChecksum += smbiosHeader.anchorString[i];
+
+    // The checksum goes here, but we're figuring it out as we go.
+
+    port->writeBlob(addr + 0x5,
+            (uint8_t *)(&smbiosHeader.entryPointLength), 1);
+    mainChecksum += smbiosHeader.entryPointLength;
+    port->writeBlob(addr + 0x6,
+            (uint8_t *)(&smbiosHeader.majorVersion), 1);
+    mainChecksum += smbiosHeader.majorVersion;
+    port->writeBlob(addr + 0x7,
+            (uint8_t *)(&smbiosHeader.minorVersion), 1);
+    mainChecksum += smbiosHeader.minorVersion;
+    // Maximum structure size goes here, but we'll figure it out later.
+    port->writeBlob(addr + 0xA,
+            (uint8_t *)(&smbiosHeader.entryPointRevision), 1);
+    mainChecksum += smbiosHeader.entryPointRevision;
+    port->writeBlob(addr + 0xB,
+            (uint8_t *)(&smbiosHeader.formattedArea), 5);
+    for (int i = 0; i < 5; i++)
+        mainChecksum += smbiosHeader.formattedArea[i];
+
+    /*
+     * The intermediate header
+     */
+    uint8_t intChecksum = 0;
+
+    port->writeBlob(addr + 0x10,
+            (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
+    for (int i = 0; i < 5; i++)
+        intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
+
+    // The checksum goes here, but we're figuring it out as we go.
+    // Then the length of the structure table which we'll find later
+
+    uint32_t tableAddrGuest =
+        X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
+    port->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
+    for (int i = 0; i < 4; i++) {
+        intChecksum += tableAddrGuest;
+        tableAddrGuest >>= 8;
+    }
+
+    uint16_t numStructs = X86ISA::gtoh(structures.size());
+    port->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
+    for (int i = 0; i < 2; i++) {
+        intChecksum += numStructs;
+        numStructs >>= 8;
+    }
+
+    port->writeBlob(addr + 0x1E,
+            (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
+            1);
+    intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
+
+    /*
+     * Structure table
+     */
+
+    Addr base = smbiosHeader.intermediateHeader.tableAddr;
+    Addr offset = 0;
+    uint16_t maxSize = 0;
+    std::vector<SMBiosStructure *>::iterator it;
+    for (it = structures.begin(); it != structures.end(); it++) {
+        uint16_t size = (*it)->writeOut(port, base + offset);
+        if (size > maxSize)
+            maxSize = size;
+        offset += size;
+    }
+
+    structSize = offset;
+
+    /*
+     * Header
+     */
+
+    maxSize = X86ISA::htog(maxSize);
+    port->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
+    for (int i = 0; i < 2; i++) {
+        mainChecksum += maxSize;
+        maxSize >>= 8;
+    }
+
+    // Set the checksum
+    mainChecksum = -mainChecksum;
+    port->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
+
+    /*
+     * Intermediate header
+     */
+
+    uint16_t tableSize = offset;
+    tableSize = X86ISA::htog(tableSize);
+    port->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
+    for (int i = 0; i < 2; i++) {
+        intChecksum += tableSize;
+        tableSize >>= 8;
+    }
+
+    intChecksum = -intChecksum;
+    port->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
+}
+
+X86ISA::SMBios::BiosInformation *
+X86SMBiosBiosInformationParams::create()
+{
+    return new X86ISA::SMBios::BiosInformation(this);
+}
+
+X86ISA::SMBios::SMBiosTable *
+X86SMBiosSMBiosTableParams::create()
+{
+    return new X86ISA::SMBios::SMBiosTable(this);
+}
diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh
new file mode 100644
index 000000000..1c50d0b48
--- /dev/null
+++ b/src/arch/x86/bios/smbios.hh
@@ -0,0 +1,278 @@
+/*
+ * Copyright (c) 2008 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+/*
+ * Copyright (c) 2008 The Hewlett-Packard Development Company
+ * All rights reserved.
+ *
+ * Redistribution and use of this software in source and binary forms,
+ * with or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * The software must be used only for Non-Commercial Use which means any
+ * use which is NOT directed to receiving any direct monetary
+ * compensation for, or commercial advantage from such use.  Illustrative
+ * examples of non-commercial use are academic research, personal study,
+ * teaching, education and corporate research & development.
+ * Illustrative examples of commercial use are distributing products for
+ * commercial advantage and providing services using the software for
+ * commercial advantage.
+ *
+ * If you wish to use this software or functionality therein that may be
+ * covered by patents for commercial use, please contact:
+ *     Director of Intellectual Property Licensing
+ *     Office of Strategy and Technology
+ *     Hewlett-Packard Company
+ *     1501 Page Mill Road
+ *     Palo Alto, California  94304
+ *
+ * Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  Redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.  Neither the name of
+ * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.  No right of
+ * sublicense is granted herewith.  Derivatives of the software and
+ * output created using the software may be prepared, but only for
+ * Non-Commercial Uses.  Derivatives of the software may be shared with
+ * others provided: (i) the others agree to abide by the list of
+ * conditions herein which includes the Non-Commercial Use restrictions;
+ * and (ii) such Derivatives of the software include the above copyright
+ * notice to acknowledge the contribution from this software where
+ * applicable, this list of conditions and the disclaimer below.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_X86_BIOS_SMBIOS_HH__
+#define __ARCH_X86_BIOS_SMBIOS_HH__
+
+#include <string>
+#include <vector>
+
+#include "enums/Characteristic.hh"
+#include "enums/ExtCharacteristic.hh"
+#include "sim/host.hh"
+#include "sim/sim_object.hh"
+
+class FunctionalPort;
+class X86SMBiosBiosInformationParams;
+class X86SMBiosSMBiosStructureParams;
+class X86SMBiosSMBiosTableParams;
+
+namespace X86ISA
+{
+
+namespace SMBios
+{
+
+class SMBiosStructure : public SimObject
+{
+  protected:
+    typedef X86SMBiosSMBiosStructureParams Params;
+
+  public:
+
+    virtual
+    ~SMBiosStructure()
+    {}
+
+    // Offset 00h, 1 byte
+    uint8_t type;
+
+    // Offset 01h, 1 byte
+    //Length: computed when written to memory.
+
+    // Offset 02h, 2 bytes
+    uint16_t handle;
+
+    virtual uint8_t
+    getLength()
+    {
+        // This is the size of a structure with nothing but the header
+        return 4;
+    }
+
+    virtual uint16_t writeOut(FunctionalPort * port, Addr addr);
+
+  protected:
+    bool stringFields;
+
+    SMBiosStructure(Params * p, uint8_t _type);
+
+    std::vector<std::string> strings;
+
+    void writeOutStrings(FunctionalPort * port, Addr addr);
+
+    int getStringLength();
+
+  public:
+
+    int addString(std::string & newString);
+    std::string readString(int n);
+    void setString(int n, std::string & newString);
+};
+
+class BiosInformation : public SMBiosStructure
+{
+  protected:
+    const static uint8_t Type = 0;
+
+    typedef X86SMBiosBiosInformationParams Params;
+
+  public:
+    // Offset 04h, 1 byte
+    uint8_t vendor;
+    // Offset 05h, 1 byte
+    uint8_t version;
+    // Offset 06h, 2 bytes
+    uint16_t startingAddrSegment;
+    // Offset 08h, 1 byte
+    uint8_t releaseDate;
+    // Offset 09h, 1 byte
+    uint8_t romSize;
+    // Offset 0Ah, 8 bytes
+    //See tables in 3.3.1 in the SMBios 2.5 spec from the DMTF for
+    //bit definitions.
+    uint64_t characteristics;
+    // Offset 12h, 2 bytes
+    uint16_t characteristicExtBytes;
+    // Offset 14h, 1 byte
+    uint8_t majorVer;
+    // Offset 15h, 1 byte
+    uint8_t minorVer;
+    // Offset 16h, 1 byte
+    uint8_t embContFirmwareMajor;
+    // Offset 17h, 1 byte
+    uint8_t embContFirmwareMinor;
+
+    BiosInformation(Params * p);
+
+    uint8_t getLength() { return 0x18; }
+    uint16_t writeOut(FunctionalPort * port, Addr addr);
+};
+
+class SMBiosTable : public SimObject
+{
+  protected:
+    typedef X86SMBiosSMBiosTableParams Params;
+
+    struct SMBiosHeader
+    {
+        SMBiosHeader()
+        {}
+
+        // Offset 00h, 4 bytes
+        static const char anchorString[];
+
+        // Offset 04h, 1 byte
+        //Checksum: computed when written to memory.
+
+        // Offset 05h, 1 byte
+        static const uint8_t entryPointLength;
+
+        // Offset 06h, 1 byte
+        uint8_t majorVersion;
+
+        // Offset 07h, 1 byte
+        uint8_t minorVersion;
+
+        // Offset 08h, 2 bytes
+        //Maximum structure size: computed when written to memory.
+
+        // Offset 0Ah, 1 byte
+        static const uint8_t entryPointRevision;
+
+        // Offset 0Bh, 5 bytes
+        static const uint8_t formattedArea[5];
+
+        // Offset 10h, 15 bytes
+        struct IntermediateHeader
+        {
+            IntermediateHeader() : tableAddr(0)
+            {}
+            // Offset 10h, 5 bytes
+            static const char anchorString[];
+
+            // Offset 15h, 1 byte
+            //Checksum: computed when written to memory.
+
+            // Offset 16h, 2 bytes
+            //Length of the structure table in bytes: computed when
+            //written to memory.
+
+            // Offset 18h, 4 bytes
+            uint32_t tableAddr;
+
+            // Offset 1Ch, 2 bytes
+            //Number of structures: computed when written to memory
+
+            // Offset 1Eh, 1 byte
+            uint8_t smbiosBCDRevision;
+        } intermediateHeader;
+    } smbiosHeader;
+
+    std::vector<SMBiosStructure *> structures;
+
+  public:
+    SMBiosTable(Params * p);
+
+    Addr getTableAddr()
+    {
+        return smbiosHeader.intermediateHeader.tableAddr;
+    }
+
+    void setTableAddr(Addr addr)
+    {
+        smbiosHeader.intermediateHeader.tableAddr = addr;
+    }
+
+    void writeOut(FunctionalPort * port, Addr addr,
+            Addr &headerSize, Addr &structSize);
+};
+
+} //SMBios
+} //X86ISA
+
+#endif