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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-01-17 12:55:08 -0600 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-01-17 12:55:08 -0600 |
commit | f85286b3debf4a4a94d3b959e5bb880be81bd692 (patch) | |
tree | 56a6be55a52d6cc6bb7e5d92fdcb25c79ad7d196 /src/arch/x86/bios | |
parent | 06c39a154c4dc8fedcf9fbf77bbcf26f176c469c (diff) | |
download | gem5-f85286b3debf4a4a94d3b959e5bb880be81bd692.tar.xz |
MEM: Add port proxies instead of non-structural ports
Port proxies are used to replace non-structural ports, and thus enable
all ports in the system to correspond to a structural entity. This has
the advantage of accessing memory through the normal memory subsystem
and thus allowing any constellation of distributed memories, address
maps, etc. Most accesses are done through the "system port" that is
used for loading binaries, debugging etc. For the entities that belong
to the CPU, e.g. threads and thread contexts, they wrap the CPU data
port in a port proxy.
The following replacements are made:
FunctionalPort > PortProxy
TranslatingPort > SETranslatingPortProxy
VirtualPort > FSTranslatingPortProxy
--HG--
rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
Diffstat (limited to 'src/arch/x86/bios')
-rw-r--r-- | src/arch/x86/bios/intelmp.cc | 156 | ||||
-rw-r--r-- | src/arch/x86/bios/intelmp.hh | 24 | ||||
-rw-r--r-- | src/arch/x86/bios/smbios.cc | 78 | ||||
-rw-r--r-- | src/arch/x86/bios/smbios.hh | 10 |
4 files changed, 134 insertions, 134 deletions
diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc index af32709aa..974af28a5 100644 --- a/src/arch/x86/bios/intelmp.cc +++ b/src/arch/x86/bios/intelmp.cc @@ -41,7 +41,7 @@ #include "arch/x86/isa_traits.hh" #include "base/misc.hh" #include "base/types.hh" -#include "mem/port.hh" +#include "mem/port_proxy.hh" #include "sim/byteswap.hh" // Config entry types @@ -70,10 +70,10 @@ const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_"; template<class T> uint8_t -writeOutField(FunctionalPort * port, Addr addr, T val) +writeOutField(PortProxy* proxy, Addr addr, T val) { T guestVal = X86ISA::htog(val); - port->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); + proxy->writeBlob(addr, (uint8_t *)(&guestVal), sizeof(T)); uint8_t checkSum = 0; while(guestVal) { @@ -84,7 +84,7 @@ writeOutField(FunctionalPort * port, Addr addr, T val) } uint8_t -writeOutString(FunctionalPort * port, Addr addr, string str, int length) +writeOutString(PortProxy* proxy, Addr addr, string str, int length) { char cleanedString[length + 1]; cleanedString[length] = 0; @@ -97,7 +97,7 @@ writeOutString(FunctionalPort * port, Addr addr, string str, int length) memcpy(cleanedString, str.c_str(), str.length()); memset(cleanedString + str.length(), 0, length - str.length()); } - port->writeBlob(addr, (uint8_t *)(&cleanedString), length); + proxy->writeBlob(addr, (uint8_t *)(&cleanedString), length); uint8_t checkSum = 0; for (int i = 0; i < length; i++) @@ -107,7 +107,7 @@ writeOutString(FunctionalPort * port, Addr addr, string str, int length) } Addr -X86ISA::IntelMP::FloatingPointer::writeOut(FunctionalPort * port, Addr addr) +X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy* proxy, Addr addr) { // Make sure that either a config table is present or a default // configuration was found but not both. @@ -120,28 +120,28 @@ X86ISA::IntelMP::FloatingPointer::writeOut(FunctionalPort * port, Addr addr) uint8_t checkSum = 0; - port->writeBlob(addr, (uint8_t *)signature, 4); + proxy->writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; - checkSum += writeOutField(port, addr + 4, tableAddr); + checkSum += writeOutField(proxy, addr + 4, tableAddr); // The length of the structure in paragraphs, aka 16 byte chunks. uint8_t length = 1; - port->writeBlob(addr + 8, &length, 1); + proxy->writeBlob(addr + 8, &length, 1); checkSum += length; - port->writeBlob(addr + 9, &specRev, 1); + proxy->writeBlob(addr + 9, &specRev, 1); checkSum += specRev; - port->writeBlob(addr + 11, &defaultConfig, 1); + proxy->writeBlob(addr + 11, &defaultConfig, 1); checkSum += defaultConfig; uint32_t features2_5 = imcrPresent ? (1 << 7) : 0; - checkSum += writeOutField(port, addr + 12, features2_5); + checkSum += writeOutField(proxy, addr + 12, features2_5); checkSum = -checkSum; - port->writeBlob(addr + 10, &checkSum, 1); + proxy->writeBlob(addr + 10, &checkSum, 1); return 16; } @@ -158,10 +158,10 @@ X86IntelMPFloatingPointerParams::create() } Addr -X86ISA::IntelMP::BaseConfigEntry::writeOut(FunctionalPort * port, +X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum) { - port->writeBlob(addr, &type, 1); + proxy->writeBlob(addr, &type, 1); checkSum += type; return 1; } @@ -171,12 +171,12 @@ X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) : {} Addr -X86ISA::IntelMP::ExtConfigEntry::writeOut(FunctionalPort * port, +X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum) { - port->writeBlob(addr, &type, 1); + proxy->writeBlob(addr, &type, 1); checkSum += type; - port->writeBlob(addr + 1, &length, 1); + proxy->writeBlob(addr + 1, &length, 1); checkSum += length; return 1; } @@ -189,59 +189,59 @@ X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p, const char X86ISA::IntelMP::ConfigTable::signature[] = "PCMP"; Addr -X86ISA::IntelMP::ConfigTable::writeOut(FunctionalPort * port, Addr addr) +X86ISA::IntelMP::ConfigTable::writeOut(PortProxy* proxy, Addr addr) { uint8_t checkSum = 0; - port->writeBlob(addr, (uint8_t *)signature, 4); + proxy->writeBlob(addr, (uint8_t *)signature, 4); for (int i = 0; i < 4; i++) checkSum += signature[i]; // Base table length goes here but will be calculated later. - port->writeBlob(addr + 6, (uint8_t *)(&specRev), 1); + proxy->writeBlob(addr + 6, (uint8_t *)(&specRev), 1); checkSum += specRev; // The checksum goes here but is still being calculated. - checkSum += writeOutString(port, addr + 8, oemID, 8); - checkSum += writeOutString(port, addr + 16, productID, 12); + checkSum += writeOutString(proxy, addr + 8, oemID, 8); + checkSum += writeOutString(proxy, addr + 16, productID, 12); - checkSum += writeOutField(port, addr + 28, oemTableAddr); - checkSum += writeOutField(port, addr + 32, oemTableSize); - checkSum += writeOutField(port, addr + 34, (uint16_t)baseEntries.size()); - checkSum += writeOutField(port, addr + 36, localApic); + checkSum += writeOutField(proxy, addr + 28, oemTableAddr); + checkSum += writeOutField(proxy, addr + 32, oemTableSize); + checkSum += writeOutField(proxy, addr + 34, (uint16_t)baseEntries.size()); + checkSum += writeOutField(proxy, addr + 36, localApic); uint8_t reserved = 0; - port->writeBlob(addr + 43, &reserved, 1); + proxy->writeBlob(addr + 43, &reserved, 1); checkSum += reserved; vector<BaseConfigEntry *>::iterator baseEnt; uint16_t offset = 44; for (baseEnt = baseEntries.begin(); baseEnt != baseEntries.end(); baseEnt++) { - offset += (*baseEnt)->writeOut(port, addr + offset, checkSum); + offset += (*baseEnt)->writeOut(proxy, addr + offset, checkSum); } // We've found the end of the base table this point. - checkSum += writeOutField(port, addr + 4, offset); + checkSum += writeOutField(proxy, addr + 4, offset); vector<ExtConfigEntry *>::iterator extEnt; uint16_t extOffset = 0; uint8_t extCheckSum = 0; for (extEnt = extEntries.begin(); extEnt != extEntries.end(); extEnt++) { - extOffset += (*extEnt)->writeOut(port, + extOffset += (*extEnt)->writeOut(proxy, addr + offset + extOffset, extCheckSum); } - checkSum += writeOutField(port, addr + 40, extOffset); + checkSum += writeOutField(proxy, addr + 40, extOffset); extCheckSum = -extCheckSum; - checkSum += writeOutField(port, addr + 42, extCheckSum); + checkSum += writeOutField(proxy, addr + 42, extCheckSum); // And now, we finally have the whole check sum completed. checkSum = -checkSum; - writeOutField(port, addr + 7, checkSum); + writeOutField(proxy, addr + 7, checkSum); return offset + extOffset; }; @@ -261,18 +261,18 @@ X86IntelMPConfigTableParams::create() Addr X86ISA::IntelMP::Processor::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - BaseConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 1, localApicID); - checkSum += writeOutField(port, addr + 2, localApicVersion); - checkSum += writeOutField(port, addr + 3, cpuFlags); - checkSum += writeOutField(port, addr + 4, cpuSignature); - checkSum += writeOutField(port, addr + 8, featureFlags); + BaseConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 1, localApicID); + checkSum += writeOutField(proxy, addr + 2, localApicVersion); + checkSum += writeOutField(proxy, addr + 3, cpuFlags); + checkSum += writeOutField(proxy, addr + 4, cpuSignature); + checkSum += writeOutField(proxy, addr + 8, featureFlags); uint32_t reserved = 0; - port->writeBlob(addr + 12, (uint8_t *)(&reserved), 4); - port->writeBlob(addr + 16, (uint8_t *)(&reserved), 4); + proxy->writeBlob(addr + 12, (uint8_t *)(&reserved), 4); + proxy->writeBlob(addr + 16, (uint8_t *)(&reserved), 4); return 20; } @@ -298,11 +298,11 @@ X86IntelMPProcessorParams::create() Addr X86ISA::IntelMP::Bus::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - BaseConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 1, busID); - checkSum += writeOutString(port, addr + 2, busType, 6); + BaseConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 1, busID); + checkSum += writeOutString(proxy, addr + 2, busType, 6); return 8; } @@ -318,13 +318,13 @@ X86IntelMPBusParams::create() Addr X86ISA::IntelMP::IOAPIC::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - BaseConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 1, id); - checkSum += writeOutField(port, addr + 2, version); - checkSum += writeOutField(port, addr + 3, flags); - checkSum += writeOutField(port, addr + 4, address); + BaseConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 1, id); + checkSum += writeOutField(proxy, addr + 2, version); + checkSum += writeOutField(proxy, addr + 3, flags); + checkSum += writeOutField(proxy, addr + 4, address); return 8; } @@ -343,15 +343,15 @@ X86IntelMPIOAPICParams::create() Addr X86ISA::IntelMP::IntAssignment::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - BaseConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 1, interruptType); - checkSum += writeOutField(port, addr + 2, flags); - checkSum += writeOutField(port, addr + 4, sourceBusID); - checkSum += writeOutField(port, addr + 5, sourceBusIRQ); - checkSum += writeOutField(port, addr + 6, destApicID); - checkSum += writeOutField(port, addr + 7, destApicIntIn); + BaseConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 1, interruptType); + checkSum += writeOutField(proxy, addr + 2, flags); + checkSum += writeOutField(proxy, addr + 4, sourceBusID); + checkSum += writeOutField(proxy, addr + 5, sourceBusIRQ); + checkSum += writeOutField(proxy, addr + 6, destApicID); + checkSum += writeOutField(proxy, addr + 7, destApicIntIn); return 8; } @@ -381,13 +381,13 @@ X86IntelMPLocalIntAssignmentParams::create() Addr X86ISA::IntelMP::AddrSpaceMapping::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - ExtConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 2, busID); - checkSum += writeOutField(port, addr + 3, addrType); - checkSum += writeOutField(port, addr + 4, addr); - checkSum += writeOutField(port, addr + 12, addrLength); + ExtConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 2, busID); + checkSum += writeOutField(proxy, addr + 3, addrType); + checkSum += writeOutField(proxy, addr + 4, addr); + checkSum += writeOutField(proxy, addr + 12, addrLength); return length; } @@ -405,15 +405,15 @@ X86IntelMPAddrSpaceMappingParams::create() Addr X86ISA::IntelMP::BusHierarchy::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - ExtConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 2, busID); - checkSum += writeOutField(port, addr + 3, info); - checkSum += writeOutField(port, addr + 4, parentBus); + ExtConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 2, busID); + checkSum += writeOutField(proxy, addr + 3, info); + checkSum += writeOutField(proxy, addr + 4, parentBus); uint32_t reserved = 0; - port->writeBlob(addr + 5, (uint8_t *)(&reserved), 3); + proxy->writeBlob(addr + 5, (uint8_t *)(&reserved), 3); return length; } @@ -434,12 +434,12 @@ X86IntelMPBusHierarchyParams::create() Addr X86ISA::IntelMP::CompatAddrSpaceMod::writeOut( - FunctionalPort * port, Addr addr, uint8_t &checkSum) + PortProxy* proxy, Addr addr, uint8_t &checkSum) { - ExtConfigEntry::writeOut(port, addr, checkSum); - checkSum += writeOutField(port, addr + 2, busID); - checkSum += writeOutField(port, addr + 3, mod); - checkSum += writeOutField(port, addr + 4, rangeList); + ExtConfigEntry::writeOut(proxy, addr, checkSum); + checkSum += writeOutField(proxy, addr + 2, busID); + checkSum += writeOutField(proxy, addr + 3, mod); + checkSum += writeOutField(proxy, addr + 4, rangeList); return length; } diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh index 117466b48..0ddb62b8d 100644 --- a/src/arch/x86/bios/intelmp.hh +++ b/src/arch/x86/bios/intelmp.hh @@ -51,7 +51,7 @@ #include "enums/X86IntelMPTriggerMode.hh" #include "sim/sim_object.hh" -class FunctionalPort; +class PortProxy; // Config entry types class X86IntelMPBaseConfigEntryParams; @@ -93,7 +93,7 @@ class FloatingPointer : public SimObject public: - Addr writeOut(FunctionalPort * port, Addr addr); + Addr writeOut(PortProxy* proxy, Addr addr); Addr getTableAddr() { @@ -117,7 +117,7 @@ class BaseConfigEntry : public SimObject public: - virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); BaseConfigEntry(Params * p, uint8_t _type); }; @@ -132,7 +132,7 @@ class ExtConfigEntry : public SimObject public: - virtual Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length); }; @@ -155,7 +155,7 @@ class ConfigTable : public SimObject std::vector<ExtConfigEntry *> extEntries; public: - Addr writeOut(FunctionalPort * port, Addr addr); + Addr writeOut(PortProxy* proxy, Addr addr); ConfigTable(Params * p); }; @@ -172,7 +172,7 @@ class Processor : public BaseConfigEntry uint32_t featureFlags; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); Processor(Params * p); }; @@ -186,7 +186,7 @@ class Bus : public BaseConfigEntry std::string busType; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); Bus(Params * p); }; @@ -202,7 +202,7 @@ class IOAPIC : public BaseConfigEntry uint32_t address; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); IOAPIC(Params * p); }; @@ -221,7 +221,7 @@ class IntAssignment : public BaseConfigEntry uint8_t destApicIntIn; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); IntAssignment(X86IntelMPBaseConfigEntryParams * p, Enums::X86IntelMPInterruptType _interruptType, @@ -269,7 +269,7 @@ class AddrSpaceMapping : public ExtConfigEntry uint64_t addrLength; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); AddrSpaceMapping(Params * p); }; @@ -284,7 +284,7 @@ class BusHierarchy : public ExtConfigEntry uint8_t parentBus; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); BusHierarchy(Params * p); }; @@ -299,7 +299,7 @@ class CompatAddrSpaceMod : public ExtConfigEntry uint32_t rangeList; public: - Addr writeOut(FunctionalPort * port, Addr addr, uint8_t &checkSum); + Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum); CompatAddrSpaceMod(Params * p); }; diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc index c9015df0f..a85ece1ec 100644 --- a/src/arch/x86/bios/smbios.cc +++ b/src/arch/x86/bios/smbios.cc @@ -43,7 +43,7 @@ #include "arch/x86/bios/smbios.hh" #include "arch/x86/isa_traits.hh" #include "base/types.hh" -#include "mem/port.hh" +#include "mem/port_proxy.hh" #include "params/X86SMBiosBiosInformation.hh" #include "params/X86SMBiosSMBiosStructure.hh" #include "params/X86SMBiosSMBiosTable.hh" @@ -74,15 +74,15 @@ composeBitVector(T vec) } uint16_t -X86ISA::SMBios::SMBiosStructure::writeOut(FunctionalPort * port, Addr addr) +X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy* proxy, Addr addr) { - port->writeBlob(addr, (uint8_t *)(&type), 1); + proxy->writeBlob(addr, (uint8_t *)(&type), 1); uint8_t length = getLength(); - port->writeBlob(addr + 1, (uint8_t *)(&length), 1); + proxy->writeBlob(addr + 1, (uint8_t *)(&length), 1); uint16_t handleGuest = X86ISA::htog(handle); - port->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); + proxy->writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2); return length + getStringLength(); } @@ -93,7 +93,7 @@ X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) : void X86ISA::SMBios::SMBiosStructure::writeOutStrings( - FunctionalPort * port, Addr addr) + PortProxy* proxy, Addr addr) { std::vector<std::string>::iterator it; Addr offset = 0; @@ -103,16 +103,16 @@ X86ISA::SMBios::SMBiosStructure::writeOutStrings( // If there are string fields but none of them are used, that's a // special case which is handled by this if. if (strings.size() == 0 && stringFields) { - port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); offset++; } else { for (it = strings.begin(); it != strings.end(); it++) { - port->writeBlob(addr + offset, + proxy->writeBlob(addr + offset, (uint8_t *)it->c_str(), it->length() + 1); offset += it->length() + 1; } } - port->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); + proxy->writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1); } int @@ -172,32 +172,32 @@ X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) : } uint16_t -X86ISA::SMBios::BiosInformation::writeOut(FunctionalPort * port, Addr addr) +X86ISA::SMBios::BiosInformation::writeOut(PortProxy* proxy, Addr addr) { - uint8_t size = SMBiosStructure::writeOut(port, addr); + uint8_t size = SMBiosStructure::writeOut(proxy, addr); - port->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); - port->writeBlob(addr + 0x5, (uint8_t *)(&version), 1); + proxy->writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1); + proxy->writeBlob(addr + 0x5, (uint8_t *)(&version), 1); uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment); - port->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); + proxy->writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2); - port->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); - port->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); + proxy->writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1); + proxy->writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1); uint64_t characteristicsGuest = X86ISA::htog(characteristics); - port->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); + proxy->writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8); uint16_t characteristicExtBytesGuest = X86ISA::htog(characteristicExtBytes); - port->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); + proxy->writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2); - port->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); - port->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); - port->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); - port->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); + proxy->writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1); + proxy->writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1); + proxy->writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1); + proxy->writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1); - writeOutStrings(port, addr + getLength()); + writeOutStrings(proxy, addr + getLength()); return size; } @@ -214,7 +214,7 @@ X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) : } void -X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, +X86ISA::SMBios::SMBiosTable::writeOut(PortProxy* proxy, Addr addr, Addr &headerSize, Addr &structSize) { headerSize = 0x1F; @@ -224,26 +224,26 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, */ uint8_t mainChecksum = 0; - port->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); + proxy->writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4); for (int i = 0; i < 4; i++) mainChecksum += smbiosHeader.anchorString[i]; // The checksum goes here, but we're figuring it out as we go. - port->writeBlob(addr + 0x5, + proxy->writeBlob(addr + 0x5, (uint8_t *)(&smbiosHeader.entryPointLength), 1); mainChecksum += smbiosHeader.entryPointLength; - port->writeBlob(addr + 0x6, + proxy->writeBlob(addr + 0x6, (uint8_t *)(&smbiosHeader.majorVersion), 1); mainChecksum += smbiosHeader.majorVersion; - port->writeBlob(addr + 0x7, + proxy->writeBlob(addr + 0x7, (uint8_t *)(&smbiosHeader.minorVersion), 1); mainChecksum += smbiosHeader.minorVersion; // Maximum structure size goes here, but we'll figure it out later. - port->writeBlob(addr + 0xA, + proxy->writeBlob(addr + 0xA, (uint8_t *)(&smbiosHeader.entryPointRevision), 1); mainChecksum += smbiosHeader.entryPointRevision; - port->writeBlob(addr + 0xB, + proxy->writeBlob(addr + 0xB, (uint8_t *)(&smbiosHeader.formattedArea), 5); for (int i = 0; i < 5; i++) mainChecksum += smbiosHeader.formattedArea[i]; @@ -253,7 +253,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, */ uint8_t intChecksum = 0; - port->writeBlob(addr + 0x10, + proxy->writeBlob(addr + 0x10, (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5); for (int i = 0; i < 5; i++) intChecksum += smbiosHeader.intermediateHeader.anchorString[i]; @@ -263,20 +263,20 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, uint32_t tableAddrGuest = X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr); - port->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); + proxy->writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4); for (int i = 0; i < 4; i++) { intChecksum += tableAddrGuest; tableAddrGuest >>= 8; } uint16_t numStructs = X86ISA::gtoh(structures.size()); - port->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); + proxy->writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2); for (int i = 0; i < 2; i++) { intChecksum += numStructs; numStructs >>= 8; } - port->writeBlob(addr + 0x1E, + proxy->writeBlob(addr + 0x1E, (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision), 1); intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision; @@ -290,7 +290,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, uint16_t maxSize = 0; std::vector<SMBiosStructure *>::iterator it; for (it = structures.begin(); it != structures.end(); it++) { - uint16_t size = (*it)->writeOut(port, base + offset); + uint16_t size = (*it)->writeOut(proxy, base + offset); if (size > maxSize) maxSize = size; offset += size; @@ -303,7 +303,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, */ maxSize = X86ISA::htog(maxSize); - port->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); + proxy->writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2); for (int i = 0; i < 2; i++) { mainChecksum += maxSize; maxSize >>= 8; @@ -311,7 +311,7 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, // Set the checksum mainChecksum = -mainChecksum; - port->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); + proxy->writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1); /* * Intermediate header @@ -319,14 +319,14 @@ X86ISA::SMBios::SMBiosTable::writeOut(FunctionalPort * port, Addr addr, uint16_t tableSize = offset; tableSize = X86ISA::htog(tableSize); - port->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); + proxy->writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2); for (int i = 0; i < 2; i++) { intChecksum += tableSize; tableSize >>= 8; } intChecksum = -intChecksum; - port->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); + proxy->writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1); } X86ISA::SMBios::BiosInformation * diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh index b9c35bd09..9fa6cd6dc 100644 --- a/src/arch/x86/bios/smbios.hh +++ b/src/arch/x86/bios/smbios.hh @@ -51,7 +51,7 @@ #include "enums/ExtCharacteristic.hh" #include "sim/sim_object.hh" -class FunctionalPort; +class PortProxy; class X86SMBiosBiosInformationParams; class X86SMBiosSMBiosStructureParams; class X86SMBiosSMBiosTableParams; @@ -89,7 +89,7 @@ class SMBiosStructure : public SimObject return 4; } - virtual uint16_t writeOut(FunctionalPort * port, Addr addr); + virtual uint16_t writeOut(PortProxy* proxy, Addr addr); protected: bool stringFields; @@ -98,7 +98,7 @@ class SMBiosStructure : public SimObject std::vector<std::string> strings; - void writeOutStrings(FunctionalPort * port, Addr addr); + void writeOutStrings(PortProxy* proxy, Addr addr); int getStringLength(); @@ -145,7 +145,7 @@ class BiosInformation : public SMBiosStructure BiosInformation(Params * p); uint8_t getLength() { return 0x18; } - uint16_t writeOut(FunctionalPort * port, Addr addr); + uint16_t writeOut(PortProxy* proxy, Addr addr); }; class SMBiosTable : public SimObject @@ -223,7 +223,7 @@ class SMBiosTable : public SimObject smbiosHeader.intermediateHeader.tableAddr = addr; } - void writeOut(FunctionalPort * port, Addr addr, + void writeOut(PortProxy* proxy, Addr addr, Addr &headerSize, Addr &structSize); }; |