arch-x86: Adding clflush, clflushopt, clwb instructions

This patch adds support for cache flushing instructions in x86.
It piggybacks on support for similar instructions in arm ISA
added by Nikos Nikoleris. I have tested each instruction using
microbenchmarks.

Change-Id: I72b6b8dc30c236a21eff7958fa231f0663532d7d
Reviewed-on: https://gem5-review.googlesource.com/7401
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index c78b72030..867087eb0 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -37,6 +37,12 @@ namespace X86ISA {
     enum StandardCpuidFunction {
         VendorAndLargestStdFunc,
         FamilyModelStepping,
+        CacheAndTLB,
+        SerialNumber,
+        CacheParams,
+        MonitorMwait,
+        ThermalPowerMgmt,
+        ExtendedFeatures,
         NumStandardCpuidFuncs
     };
 
@@ -158,6 +164,10 @@ namespace X86ISA {
                 result = CpuidResult(0x00020f51, 0x00000805,
                                      0xe7dbfbff, 0x04000209);
                 break;
+              case ExtendedFeatures:
+                result = CpuidResult(0x00000000, 0x01800000,
+                                     0x00000000, 0x00000000);
+                break;
               default:
                 warn("x86 cpuid family 0x0000: unimplemented function %u",
                     funcNum);