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author | Swapnil Haria <swapnilster@gmail.com> | 2018-01-15 21:49:17 -0600 |
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committer | Jason Lowe-Power <jason@lowepower.com> | 2018-01-23 22:17:46 +0000 |
commit | 83f2b253989fd6dfc8f48d5368ae351ade91cfc6 (patch) | |
tree | c11f04427040c2efedb3cbfea8227293861ba8ff /src/arch/x86/cpuid.cc | |
parent | b074a15ec16b595cbe00cb63e2feff40059b60fb (diff) | |
download | gem5-83f2b253989fd6dfc8f48d5368ae351ade91cfc6.tar.xz |
arch-x86: Adding clflush, clflushopt, clwb instructions
This patch adds support for cache flushing instructions in x86.
It piggybacks on support for similar instructions in arm ISA
added by Nikos Nikoleris. I have tested each instruction using
microbenchmarks.
Change-Id: I72b6b8dc30c236a21eff7958fa231f0663532d7d
Reviewed-on: https://gem5-review.googlesource.com/7401
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/x86/cpuid.cc')
-rw-r--r-- | src/arch/x86/cpuid.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc index c78b72030..867087eb0 100644 --- a/src/arch/x86/cpuid.cc +++ b/src/arch/x86/cpuid.cc @@ -37,6 +37,12 @@ namespace X86ISA { enum StandardCpuidFunction { VendorAndLargestStdFunc, FamilyModelStepping, + CacheAndTLB, + SerialNumber, + CacheParams, + MonitorMwait, + ThermalPowerMgmt, + ExtendedFeatures, NumStandardCpuidFuncs }; @@ -158,6 +164,10 @@ namespace X86ISA { result = CpuidResult(0x00020f51, 0x00000805, 0xe7dbfbff, 0x04000209); break; + case ExtendedFeatures: + result = CpuidResult(0x00000000, 0x01800000, + 0x00000000, 0x00000000); + break; default: warn("x86 cpuid family 0x0000: unimplemented function %u", funcNum); |