ISA,CPU: Generalize and split out the components of the decode cache.

This will allow it to be specialized by the ISAs. The existing caching scheme
is provided by the BasicDecodeCache in the GenericISA namespace and is built
from the generalized components.

--HG--
rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc

1 files changed, 5 insertions, 8 deletions

diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 300e2238c..725d443d6 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -40,7 +40,7 @@
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
 #include "debug/Decoder.hh"
 
 class ThreadContext;
@@ -218,8 +218,9 @@ class Decoder
     }
 
   protected:
-    /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    /// Caching for decoded instruction objects.
+    static DecodeCache::InstMap instMap;
+    static DecodeCache::AddrMap<StaticInstPtr> decodePages;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);
@@ -227,11 +228,7 @@ class Decoder
     /// Decode a machine instruction.
     /// @param mach_inst The binary instruction to decode.
     /// @retval A pointer to the corresponding StaticInst object.
-    StaticInstPtr
-    decode(ExtMachInst mach_inst, Addr addr)
-    {
-        return defaultCache.decode(this, mach_inst, addr);
-    }
+    StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
 
     StaticInstPtr
     decode(X86ISA::PCState &nextPC)