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authorGabe Black <gblack@eecs.umich.edu>2007-08-04 20:12:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-04 20:12:54 -0700
commite410a925df8d37f386c97dc7cdd9a78347ce4700 (patch)
treeb4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/emulenv.hh
parentced6cbcccf4540358093f060dad4d59ad6557d6a (diff)
downloadgem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment base addresses. Also fix some microcode and add sib and riprel "keywords" to the x86 specialization of the microassembler. --HG-- extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/emulenv.hh')
-rw-r--r--src/arch/x86/emulenv.hh6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/arch/x86/emulenv.hh b/src/arch/x86/emulenv.hh
index 66c56fb79..1044dbdf9 100644
--- a/src/arch/x86/emulenv.hh
+++ b/src/arch/x86/emulenv.hh
@@ -58,8 +58,9 @@
#ifndef __ARCH_X86_EMULENV_HH__
#define __ARCH_X86_EMULENV_HH__
-#include "arch/x86/types.hh"
#include "arch/x86/intregs.hh"
+#include "arch/x86/segmentregs.hh"
+#include "arch/x86/types.hh"
namespace X86ISA
{
@@ -67,6 +68,7 @@ namespace X86ISA
{
RegIndex reg;
RegIndex regm;
+ SegmentRegIndex seg;
uint8_t scale;
RegIndex index;
RegIndex base;
@@ -76,7 +78,7 @@ namespace X86ISA
EmulEnv(RegIndex _reg, RegIndex _regm,
int _dataSize, int _addressSize, int _stackSize) :
- reg(_reg), regm(_regm),
+ reg(_reg), regm(_regm), seg(SEGMENT_REG_DS),
scale(0), index(NUM_INTREGS),
base(NUM_INTREGS),
dataSize(_dataSize), addressSize(_addressSize),