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author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-26 16:47:48 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-26 16:47:48 -0700 |
commit | 4ee34dfb4e3b0441427cbd978deb0d1d32cf19bc (patch) | |
tree | 954798bbb5b77fadfecfd98b66a18cca7c847046 /src/arch/x86/faults.cc | |
parent | 06b3e3c303599e4227212638fa4778d115842eea (diff) | |
download | gem5-4ee34dfb4e3b0441427cbd978deb0d1d32cf19bc.tar.xz |
X86: Centralize updates to the handy M5 reg.
Diffstat (limited to 'src/arch/x86/faults.cc')
-rw-r--r-- | src/arch/x86/faults.cc | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index bef7e4414..10b539248 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -271,12 +271,8 @@ namespace X86ISA tc->setMiscReg(MISCREG_DR6, 0x00000000ffff0ff0ULL); tc->setMiscReg(MISCREG_DR7, 0x0000000000000400ULL); - // We're now in real mode, effectively at CPL 0 - HandyM5Reg m5Reg = 0; - m5Reg.mode = LegacyMode; - m5Reg.submode = RealMode; - m5Reg.cpl = 0; - tc->setMiscReg(MISCREG_M5_REG, m5Reg); + // Update the handy M5 Reg. + tc->setMiscReg(MISCREG_M5_REG, 0); MicroPC entry = X86ISAInst::RomLabels::extern_label_initIntHalt; tc->setMicroPC(romMicroPC(entry)); tc->setNextMicroPC(romMicroPC(entry) + 1); @@ -289,7 +285,7 @@ namespace X86ISA HandyM5Reg m5Reg = tc->readMiscReg(MISCREG_M5_REG); if (m5Reg.mode != LegacyMode || m5Reg.submode != RealMode) { panic("Startup IPI recived outside of real mode. " - "Don't know what to do."); + "Don't know what to do. %d, %d", m5Reg.mode, m5Reg.submode); } tc->setMiscReg(MISCREG_CS, vector << 8); |