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author | Korey Sewell <ksewell@umich.edu> | 2007-11-15 00:14:20 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2007-11-15 00:14:20 -0500 |
commit | 375ddf8d25c3d81a77bd5dd7b70f84a0dbe48fe8 (patch) | |
tree | 525cf56502718b69fb7f0e78162a8d5e63256489 /src/arch/x86/faults.cc | |
parent | 2820a448e2bcb861d099b1256087004462b78895 (diff) | |
parent | 7c8e4ca3a3b66becbc3e4e7b5e106f5c44b09b6f (diff) | |
download | gem5-375ddf8d25c3d81a77bd5dd7b70f84a0dbe48fe8.tar.xz |
branch merge
--HG--
extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
Diffstat (limited to 'src/arch/x86/faults.cc')
-rw-r--r-- | src/arch/x86/faults.cc | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 13341f1de..1c94a1251 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -93,6 +93,8 @@ #include "arch/x86/isa_traits.hh" #include "mem/page_table.hh" #include "sim/process.hh" +#else +#include "arch/x86/tlb.hh" #endif namespace X86ISA @@ -112,6 +114,19 @@ namespace X86ISA { panic("X86 faults are not implemented!"); } + + void FakeITLBFault::invoke(ThreadContext * tc) + { + // Start the page table walker. + tc->getITBPtr()->walk(tc, vaddr); + } + + void FakeDTLBFault::invoke(ThreadContext * tc) + { + // Start the page table walker. + tc->getDTBPtr()->walk(tc, vaddr); + } + #else // !FULL_SYSTEM void FakeITLBFault::invoke(ThreadContext * tc) { |