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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-09-13 19:26:03 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-09-13 19:26:03 -0700 |
| commit | 6833ca7eedd351596bb1518620af7465f5172fcd (patch) | |
| tree | 4a67b3d591132dab3e8273fc9dfba606a1720e4a /src/arch/x86/faults.cc | |
| parent | 2edfcbbaee87c1a28351fc0dcd81d52d0d9102a4 (diff) | |
| download | gem5-6833ca7eedd351596bb1518620af7465f5172fcd.tar.xz | |
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Also move the "Fault" reference counted pointer type into a separate file,
sim/fault.hh. It would be better to name this less similarly to sim/faults.hh
to reduce confusion, but fault.hh matches the name of the type. We could change
Fault to FaultPtr to match other pointer types, and then changing the name of
the file would make more sense.
Diffstat (limited to 'src/arch/x86/faults.cc')
| -rw-r--r-- | src/arch/x86/faults.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 836a78567..4c8fb33c2 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -56,7 +56,7 @@ namespace X86ISA { #if FULL_SYSTEM - void X86FaultBase::invoke(ThreadContext * tc) + void X86FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst) { Addr pc = tc->readPC(); DPRINTF(Faults, "RIP %#x: vector %d: %s\n", pc, vector, describe()); @@ -102,7 +102,7 @@ namespace X86ISA return ss.str(); } - void X86Trap::invoke(ThreadContext * tc) + void X86Trap::invoke(ThreadContext * tc, StaticInstPtr inst) { X86FaultBase::invoke(tc); // This is the same as a fault, but it happens -after- the instruction. @@ -111,12 +111,12 @@ namespace X86ISA tc->setNextNPC(tc->readNextNPC() + sizeof(MachInst)); } - void X86Abort::invoke(ThreadContext * tc) + void X86Abort::invoke(ThreadContext * tc, StaticInstPtr inst) { panic("Abort exception!"); } - void PageFault::invoke(ThreadContext * tc) + void PageFault::invoke(ThreadContext * tc, StaticInstPtr inst) { HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); X86FaultBase::invoke(tc); @@ -141,7 +141,7 @@ namespace X86ISA } void - InitInterrupt::invoke(ThreadContext *tc) + InitInterrupt::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(Faults, "Init interrupt.\n"); // The otherwise unmodified integer registers should be set to 0. @@ -248,7 +248,7 @@ namespace X86ISA } void - StartupInterrupt::invoke(ThreadContext *tc) + StartupInterrupt::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(Faults, "Startup interrupt with vector %#x.\n", vector); HandyM5Reg m5Reg = tc->readMiscReg(MISCREG_M5_REG); @@ -270,7 +270,7 @@ namespace X86ISA #else void - PageFault::invoke(ThreadContext * tc) + PageFault::invoke(ThreadContext * tc, StaticInstPtr inst) { PageFaultErrorCode code = errorCode; const char *modeStr = ""; |