diff options
| author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-18 16:28:36 +0200 |
|---|---|---|
| committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-18 16:28:36 +0200 |
| commit | c9c02efb99c0a982c116c7d1d8ed9a984c174198 (patch) | |
| tree | 98932488143530c5657ccd25bc7e88d660e95aae /src/arch/x86/faults.cc | |
| parent | 688fc7f71f3321225f6334a1caa380115f506ce9 (diff) | |
| download | gem5-c9c02efb99c0a982c116c7d1d8ed9a984c174198.tar.xz | |
x86: Initialize the MXCSR register
Diffstat (limited to 'src/arch/x86/faults.cc')
| -rw-r--r-- | src/arch/x86/faults.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 92f3dc257..995326562 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -268,6 +268,8 @@ namespace X86ISA tc->setMiscReg(MISCREG_DR6, 0x00000000ffff0ff0ULL); tc->setMiscReg(MISCREG_DR7, 0x0000000000000400ULL); + tc->setMiscReg(MISCREG_MXCSR, 0x1f80); + // Update the handy M5 Reg. tc->setMiscReg(MISCREG_M5_REG, 0); MicroPC entry = X86ISAInst::RomLabels::extern_label_initIntHalt; |