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authorGabe Black <gblack@eecs.umich.edu>2010-08-23 09:44:19 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-08-23 09:44:19 -0700
commitf6182f948bdc05f3d0949627378ac5d15eea8e58 (patch)
tree2d3d3d9eae9e19a3838d36cdb26e266e07b9b34c /src/arch/x86/faults.cc
parent172e45fc97373757ff171d145e7b1f5c14573b0f (diff)
downloadgem5-f6182f948bdc05f3d0949627378ac5d15eea8e58.tar.xz
X86: Make the TLB fault instead of panic when something is unmapped in SE mode.
The fault object, if invoked, would then panic. This is a bit less direct, but it means speculative execution won't panic the simulator.
Diffstat (limited to 'src/arch/x86/faults.cc')
-rw-r--r--src/arch/x86/faults.cc16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 20b5a931e..836a78567 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -267,6 +267,22 @@ namespace X86ISA
tc->setNextPC(tc->readPC() + sizeof(MachInst));
}
+#else
+
+ void
+ PageFault::invoke(ThreadContext * tc)
+ {
+ PageFaultErrorCode code = errorCode;
+ const char *modeStr = "";
+ if (code.fetch)
+ modeStr = "execute";
+ else if (code.write)
+ modeStr = "write";
+ else
+ modeStr = "read";
+ panic("Tried to %s unmapped address %#x.\n", modeStr, addr);
+ }
+
#endif
} // namespace X86ISA