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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 22:42:10 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 22:42:10 -0700 |
| commit | 9e8e2f9ec6ae4ea3be8f5280a1ca4cb734e3e068 (patch) | |
| tree | a9e124e2bf543a3e538667ba8b1fcd3ca16ec8c6 /src/arch/x86/faults.cc | |
| parent | 4c19c56a7706c7382f46c4f8c7dd10c2b2c8746a (diff) | |
| download | gem5-9e8e2f9ec6ae4ea3be8f5280a1ca4cb734e3e068.tar.xz | |
X86: Make the x86 interrupt fault kick off the interrupt microcode.
Diffstat (limited to 'src/arch/x86/faults.cc')
| -rw-r--r-- | src/arch/x86/faults.cc | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 1c94a1251..18680899e 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -85,6 +85,7 @@ * Authors: Gabe Black */ +#include "arch/x86/decoder.hh" #include "arch/x86/faults.hh" #include "base/trace.hh" #include "config/full_system.hh" @@ -112,7 +113,18 @@ namespace X86ISA void X86Interrupt::invoke(ThreadContext * tc) { - panic("X86 faults are not implemented!"); + using namespace X86ISAInst::RomLabels; + HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); + MicroPC entry; + if (m5reg.mode == LongMode) { + entry = extern_label_longModeInterrupt; + } else { + entry = extern_label_legacyModeInterrupt; + } + tc->setIntReg(INTREG_MICRO(1), vector); + tc->setIntReg(INTREG_MICRO(7), tc->readPC()); + tc->setMicroPC(romMicroPC(entry)); + tc->setNextMicroPC(romMicroPC(entry) + 1); } void FakeITLBFault::invoke(ThreadContext * tc) |