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author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-23 00:20:34 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-23 00:20:34 -0800 |
commit | e8c1c3e72eb01409f7ec110eee3b32c07347bf6f (patch) | |
tree | 26f23b24fdfdfff630cda342e94d055437f9d5f8 /src/arch/x86/faults.hh | |
parent | 6c5afe6346b31edf6af245002c270a3c26618833 (diff) | |
download | gem5-e8c1c3e72eb01409f7ec110eee3b32c07347bf6f.tar.xz |
X86: Pass whether an access was a read/write/fetch so faults can behave accordingly.
Diffstat (limited to 'src/arch/x86/faults.hh')
-rw-r--r-- | src/arch/x86/faults.hh | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh index 6a6dfc80a..ae4314434 100644 --- a/src/arch/x86/faults.hh +++ b/src/arch/x86/faults.hh @@ -429,10 +429,12 @@ namespace X86ISA { protected: Addr vaddr; + bool write; + bool execute; public: - FakeITLBFault(Addr _vaddr) : + FakeITLBFault(Addr _vaddr, bool _write, bool _execute) : X86Fault("fake instruction tlb fault", "itlb", 0), - vaddr(_vaddr) + vaddr(_vaddr), write(_write), execute(_execute) {} void invoke(ThreadContext * tc); @@ -442,10 +444,12 @@ namespace X86ISA { protected: Addr vaddr; + bool write; + bool execute; public: - FakeDTLBFault(Addr _vaddr) : + FakeDTLBFault(Addr _vaddr, bool _write, bool _execute) : X86Fault("fake data tlb fault", "dtlb", 0), - vaddr(_vaddr) + vaddr(_vaddr), write(_write), execute(_execute) {} void invoke(ThreadContext * tc); |