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authorKorey Sewell <ksewell@umich.edu>2007-11-15 00:14:20 -0500
committerKorey Sewell <ksewell@umich.edu>2007-11-15 00:14:20 -0500
commit375ddf8d25c3d81a77bd5dd7b70f84a0dbe48fe8 (patch)
tree525cf56502718b69fb7f0e78162a8d5e63256489 /src/arch/x86/faults.hh
parent2820a448e2bcb861d099b1256087004462b78895 (diff)
parent7c8e4ca3a3b66becbc3e4e7b5e106f5c44b09b6f (diff)
downloadgem5-375ddf8d25c3d81a77bd5dd7b70f84a0dbe48fe8.tar.xz
branch merge
--HG-- extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
Diffstat (limited to 'src/arch/x86/faults.hh')
-rw-r--r--src/arch/x86/faults.hh16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index 5a573754a..78a55d0e1 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -369,44 +369,28 @@ namespace X86ISA
// the tlb on a miss and are to take the place of a hardware table walker.
class FakeITLBFault : public X86Fault
{
-#if !FULL_SYSTEM
protected:
Addr vaddr;
public:
FakeITLBFault(Addr _vaddr) :
X86Fault("fake instruction tlb fault", "itlb"),
vaddr(_vaddr)
-#else
- public:
- FakeITLBFault() :
- X86Fault("fake instruction tlb fault", "itlb")
-#endif
{}
-#if !FULL_SYSTEM
void invoke(ThreadContext * tc);
-#endif
};
class FakeDTLBFault : public X86Fault
{
-#if !FULL_SYSTEM
protected:
Addr vaddr;
public:
FakeDTLBFault(Addr _vaddr) :
X86Fault("fake data tlb fault", "dtlb"),
vaddr(_vaddr)
-#else
- public:
- FakeDTLBFault() :
- X86Fault("fake data tlb fault", "dtlb")
-#endif
{}
-#if !FULL_SYSTEM
void invoke(ThreadContext * tc);
-#endif
};
};