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authorGabe Black <gblack@eecs.umich.edu>2007-08-01 14:34:59 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-01 14:34:59 -0700
commit5b5e2fd6cdc4249fe31a1b7b45a224bbf2a88678 (patch)
tree4123156ba06e88792862319bca02960ae986d13a /src/arch/x86/insts/microldstop.cc
parent239d124e8339b254495df45df89fc249ae217d73 (diff)
downloadgem5-5b5e2fd6cdc4249fe31a1b7b45a224bbf2a88678.tar.xz
X86: Hide the irrelevant portions of the address components for load and store microops.
--HG-- extra : convert_revision : a5ac6fefa09882f0833537e23f1ac0477bc89bb9
Diffstat (limited to 'src/arch/x86/insts/microldstop.cc')
-rw-r--r--src/arch/x86/insts/microldstop.cc36
1 files changed, 30 insertions, 6 deletions
diff --git a/src/arch/x86/insts/microldstop.cc b/src/arch/x86/insts/microldstop.cc
index 9628256e4..9638a2ae3 100644
--- a/src/arch/x86/insts/microldstop.cc
+++ b/src/arch/x86/insts/microldstop.cc
@@ -64,16 +64,40 @@ namespace X86ISA
const SymbolTable *symtab) const
{
std::stringstream response;
+ bool someAddr = false;
printMnemonic(response, instMnem, mnemonic);
- printDestReg(response, 0, dataSize);
+ if(flags[IsLoad])
+ printDestReg(response, 0, dataSize);
+ else
+ printSrcReg(response, 2, dataSize);
response << ", ";
printSegment(response, segment);
- ccprintf(response, ":[%d*", scale);
- printSrcReg(response, 0, addressSize);
- response << " + ";
- printSrcReg(response, 1, addressSize);
- ccprintf(response, " + %#x]", disp);
+ response << ":[";
+ if(scale != 0 && _srcRegIdx[0] != ZeroReg)
+ {
+ if(scale != 1)
+ ccprintf(response, "%d*", scale);
+ printSrcReg(response, 0, addressSize);
+ someAddr = true;
+ }
+ if(_srcRegIdx[1] != ZeroReg)
+ {
+ if(someAddr)
+ response << " + ";
+ printSrcReg(response, 1, addressSize);
+ someAddr = true;
+ }
+ if(disp != 0)
+ {
+ if(someAddr)
+ response << " + ";
+ ccprintf(response, "%#x", disp);
+ someAddr = true;
+ }
+ if(!someAddr)
+ response << "0";
+ response << "]";
return response.str();
}
}