summaryrefslogtreecommitdiff
path: root/src/arch/x86/insts/microregop.cc
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-08-07 15:25:41 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-07 15:25:41 -0700
commit24541780c6bb4cf7f58ef7efc184da18026b587f (patch)
tree5a56d0db7c0534b08b90dae0c15b80b09eb327e7 /src/arch/x86/insts/microregop.cc
parentd79a591608106b1de4bf2cbc9b9eb31ed5bf14e9 (diff)
downloadgem5-24541780c6bb4cf7f58ef7efc184da18026b587f.tar.xz
X86: Implemented and hooked in SCAS (scan string)
Fixed the asz assembler symbol. Adjusted the condion checks to have appropriate options. Implemented the SCAS microcode. Attached SCAS into the decoder. --HG-- extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
Diffstat (limited to 'src/arch/x86/insts/microregop.cc')
-rw-r--r--src/arch/x86/insts/microregop.cc10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc
index e67a82d4f..42c540b7a 100644
--- a/src/arch/x86/insts/microregop.cc
+++ b/src/arch/x86/insts/microregop.cc
@@ -112,8 +112,9 @@ namespace X86ISA
panic("This condition is not implemented!");
case ConditionTests::MSTRC:
panic("This condition is not implemented!");
- case ConditionTests::STRZnZF:
- panic("This condition is not implemented!");
+ case ConditionTests::STRZnEZF:
+ return !ccflags.EZF & ccflags.ZF;
+ //And no interrupts or debug traps are waiting
case ConditionTests::OF:
return ccflags.OF;
case ConditionTests::CF:
@@ -144,8 +145,9 @@ namespace X86ISA
panic("This condition is not implemented!");
case ConditionTests::NotMSTRC:
panic("This condition is not implemented!");
- case ConditionTests::NotSTRZnZF:
- panic("This condition is not implemented!");
+ case ConditionTests::STRnZnEZF:
+ return !ccflags.EZF & !ccflags.ZF;
+ //And no interrupts or debug traps are waiting
case ConditionTests::NotOF:
return !ccflags.OF;
case ConditionTests::NotCF: