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authorGabe Black <gblack@eecs.umich.edu>2007-09-19 18:27:55 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-09-19 18:27:55 -0700
commita75b6f51060ceaa52014aa4dd6aadc6ca83365f8 (patch)
treea8da313b6cf771f07ab0e1b795ea6be3137d4e29 /src/arch/x86/insts/microregop.cc
parentf3f3747431e001dc6c80da5b6489516b610c22d6 (diff)
downloadgem5-a75b6f51060ceaa52014aa4dd6aadc6ca83365f8.tar.xz
X86: Move the fp microops to their own file with their own base classes in C++ and python.
--HG-- extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
Diffstat (limited to 'src/arch/x86/insts/microregop.cc')
-rw-r--r--src/arch/x86/insts/microregop.cc76
1 files changed, 0 insertions, 76 deletions
diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc
index ad48a4bc1..60f32857d 100644
--- a/src/arch/x86/insts/microregop.cc
+++ b/src/arch/x86/insts/microregop.cc
@@ -93,82 +93,6 @@ namespace X86ISA
return flags;
}
- bool RegOpBase::checkCondition(uint64_t flags) const
- {
- CCFlagBits ccflags = flags;
- switch(ext)
- {
- case ConditionTests::True:
- return true;
- case ConditionTests::ECF:
- return ccflags.ECF;
- case ConditionTests::EZF:
- return ccflags.EZF;
- case ConditionTests::SZnZF:
- return !(!ccflags.EZF & ccflags.ZF);
- case ConditionTests::MSTRZ:
- panic("This condition is not implemented!");
- case ConditionTests::STRZ:
- panic("This condition is not implemented!");
- case ConditionTests::MSTRC:
- panic("This condition is not implemented!");
- case ConditionTests::STRZnEZF:
- return !ccflags.EZF & ccflags.ZF;
- //And no interrupts or debug traps are waiting
- case ConditionTests::OF:
- return ccflags.OF;
- case ConditionTests::CF:
- return ccflags.CF;
- case ConditionTests::ZF:
- return ccflags.ZF;
- case ConditionTests::CvZF:
- return ccflags.CF | ccflags.ZF;
- case ConditionTests::SF:
- return ccflags.SF;
- case ConditionTests::PF:
- return ccflags.PF;
- case ConditionTests::SxOF:
- return ccflags.SF ^ ccflags.OF;
- case ConditionTests::SxOvZF:
- return ccflags.SF ^ ccflags.OF | ccflags.ZF;
- case ConditionTests::False:
- return false;
- case ConditionTests::NotECF:
- return !ccflags.ECF;
- case ConditionTests::NotEZF:
- return !ccflags.EZF;
- case ConditionTests::NotSZnZF:
- return !ccflags.EZF & ccflags.ZF;
- case ConditionTests::NotMSTRZ:
- panic("This condition is not implemented!");
- case ConditionTests::NotSTRZ:
- panic("This condition is not implemented!");
- case ConditionTests::NotMSTRC:
- panic("This condition is not implemented!");
- case ConditionTests::STRnZnEZF:
- return !ccflags.EZF & !ccflags.ZF;
- //And no interrupts or debug traps are waiting
- case ConditionTests::NotOF:
- return !ccflags.OF;
- case ConditionTests::NotCF:
- return !ccflags.CF;
- case ConditionTests::NotZF:
- return !ccflags.ZF;
- case ConditionTests::NotCvZF:
- return !(ccflags.CF | ccflags.ZF);
- case ConditionTests::NotSF:
- return !ccflags.SF;
- case ConditionTests::NotPF:
- return !ccflags.PF;
- case ConditionTests::NotSxOF:
- return !(ccflags.SF ^ ccflags.OF);
- case ConditionTests::NotSxOvZF:
- return !(ccflags.SF ^ ccflags.OF | ccflags.ZF);
- }
- panic("Unknown condition: %d\n", ext);
- return true;
- }
-
std::string RegOp::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{