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authorGabe Black <gblack@eecs.umich.edu>2007-07-30 13:23:33 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-30 13:23:33 -0700
commitd8beeff324f0d47927716e0081fe4a72c56601f7 (patch)
treea3eb9393a591cf73d88f98beb8076c3f3106bc75 /src/arch/x86/insts/microregop.hh
parent9b5421dcbabb3e085edca359d8ce29978594dd98 (diff)
downloadgem5-d8beeff324f0d47927716e0081fe4a72c56601f7.tar.xz
X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".
--HG-- extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
Diffstat (limited to 'src/arch/x86/insts/microregop.hh')
-rw-r--r--src/arch/x86/insts/microregop.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/insts/microregop.hh b/src/arch/x86/insts/microregop.hh
index f411c0775..f465ac651 100644
--- a/src/arch/x86/insts/microregop.hh
+++ b/src/arch/x86/insts/microregop.hh
@@ -113,6 +113,7 @@ namespace X86ISA
const RegIndex dest;
const uint8_t dataSize;
const uint16_t ext;
+ RegIndex foldOBit;
// Constructor
RegOpBase(ExtMachInst _machInst,
@@ -128,6 +129,7 @@ namespace X86ISA
src1(_src1), dest(_dest),
dataSize(_dataSize), ext(_ext)
{
+ foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
}
//Figure out what the condition code flags should be.