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authorGabe Black <gblack@eecs.umich.edu>2009-07-17 18:49:22 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-17 18:49:22 -0700
commitd85cd08113e61817fdf1df978f2713ba8b094996 (patch)
tree6159f9514ac84a4ff0792b346422b03d16052dc0 /src/arch/x86/insts/static_inst.hh
parent7b6587fc9cbd5e7e7930abbc5c6e2683e527f629 (diff)
downloadgem5-d85cd08113e61817fdf1df978f2713ba8b094996.tar.xz
X86: Set up a named constant for the "fold bit" for int register indices.
Diffstat (limited to 'src/arch/x86/insts/static_inst.hh')
-rw-r--r--src/arch/x86/insts/static_inst.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 4ca7a4984..32065f7c0 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -108,7 +108,7 @@ namespace X86ISA
inline uint64_t merge(uint64_t into, uint64_t val, int size) const
{
X86IntReg reg = into;
- if(_destRegIdx[0] & (1 << 6))
+ if(_destRegIdx[0] & IntFoldBit)
{
reg.H = val;
return reg;
@@ -139,7 +139,7 @@ namespace X86ISA
{
X86IntReg reg = from;
DPRINTF(X86, "Picking with size %d\n", size);
- if(_srcRegIdx[idx] & (1 << 6))
+ if(_srcRegIdx[idx] & IntFoldBit)
return reg.H;
switch(size)
{
@@ -160,7 +160,7 @@ namespace X86ISA
{
X86IntReg reg = from;
DPRINTF(X86, "Picking with size %d\n", size);
- if(_srcRegIdx[idx] & (1 << 6))
+ if(_srcRegIdx[idx] & IntFoldBit)
return reg.SH;
switch(size)
{