merge

4 files changed, 27 insertions, 14 deletions

diff --git a/src/arch/x86/insts/microfpop.hh b/src/arch/x86/insts/microfpop.hh
index 2e01cadbc..d3cecd67b 100644
--- a/src/arch/x86/insts/microfpop.hh
+++ b/src/arch/x86/insts/microfpop.hh
@@ -80,13 +80,13 @@ namespace X86ISA
                 const char *mnem, const char *_instMnem,
                 bool isMicro, bool isDelayed,
                 bool isFirst, bool isLast,
-                RegIndex _src1, RegIndex _src2, RegIndex _dest,
+                InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
                 uint8_t _dataSize, int8_t _spm,
                 OpClass __opClass) :
             X86MicroopBase(_machInst, mnem, _instMnem,
                     isMicro, isDelayed, isFirst, isLast,
                     __opClass),
-            src1(_src1), src2(_src2), dest(_dest),
+            src1(_src1.idx), src2(_src2.idx), dest(_dest.idx),
             dataSize(_dataSize), spm(_spm)
         {}
 /*
diff --git a/src/arch/x86/insts/microldstop.hh b/src/arch/x86/insts/microldstop.hh
index ec9cb52b3..309a2e6b7 100644
--- a/src/arch/x86/insts/microldstop.hh
+++ b/src/arch/x86/insts/microldstop.hh
@@ -93,20 +93,21 @@ namespace X86ISA
         LdStOp(ExtMachInst _machInst,
                 const char * mnem, const char * _instMnem,
                 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
-                uint8_t _scale, RegIndex _index, RegIndex _base,
-                uint64_t _disp, uint8_t _segment,
-                RegIndex _data,
+                uint8_t _scale, InstRegIndex _index, InstRegIndex _base,
+                uint64_t _disp, InstRegIndex _segment,
+                InstRegIndex _data,
                 uint8_t _dataSize, uint8_t _addressSize,
                 Request::FlagsType _memFlags,
                 OpClass __opClass) :
         X86MicroopBase(machInst, mnem, _instMnem,
                 isMicro, isDelayed, isFirst, isLast, __opClass),
-                scale(_scale), index(_index), base(_base),
-                disp(_disp), segment(_segment),
-                data(_data),
+                scale(_scale), index(_index.idx), base(_base.idx),
+                disp(_disp), segment(_segment.idx),
+                data(_data.idx),
                 dataSize(_dataSize), addressSize(_addressSize),
-                memFlags(_memFlags | _segment)
+                memFlags(_memFlags | _segment.idx)
         {
+            assert(_segment.idx < NUM_SEGMENTREGS);
             foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
             foldABit =
                 (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
diff --git a/src/arch/x86/insts/microregop.hh b/src/arch/x86/insts/microregop.hh
index d805adb33..16e1afc0a 100644
--- a/src/arch/x86/insts/microregop.hh
+++ b/src/arch/x86/insts/microregop.hh
@@ -79,13 +79,13 @@ namespace X86ISA
                 const char *mnem, const char *_instMnem,
                 bool isMicro, bool isDelayed,
                 bool isFirst, bool isLast,
-                RegIndex _src1, RegIndex _dest,
+                InstRegIndex _src1, InstRegIndex _dest,
                 uint8_t _dataSize, uint16_t _ext,
                 OpClass __opClass) :
             X86MicroopBase(_machInst, mnem, _instMnem,
                     isMicro, isDelayed, isFirst, isLast,
                     __opClass),
-            src1(_src1), dest(_dest),
+            src1(_src1.idx), dest(_dest.idx),
             dataSize(_dataSize), ext(_ext)
         {
             foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
@@ -107,14 +107,14 @@ namespace X86ISA
                 const char *mnem, const char *_instMnem,
                 bool isMicro, bool isDelayed,
                 bool isFirst, bool isLast,
-                RegIndex _src1, RegIndex _src2, RegIndex _dest,
+                InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
                 uint8_t _dataSize, uint16_t _ext,
                 OpClass __opClass) :
             RegOpBase(_machInst, mnem, _instMnem,
                     isMicro, isDelayed, isFirst, isLast,
                     _src1, _dest, _dataSize, _ext,
                     __opClass),
-            src2(_src2)
+            src2(_src2.idx)
         {
         }
 
@@ -132,7 +132,7 @@ namespace X86ISA
                 const char * mnem, const char *_instMnem,
                 bool isMicro, bool isDelayed,
                 bool isFirst, bool isLast,
-                RegIndex _src1, uint8_t _imm8, RegIndex _dest,
+                InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
                 uint8_t _dataSize, uint16_t _ext,
                 OpClass __opClass) :
             RegOpBase(_machInst, mnem, _instMnem,
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 8480f2713..4ca7a4984 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -64,6 +64,18 @@
 namespace X86ISA
 {
     /**
+     * Class for register indices passed to instruction constructors. Using a
+     * wrapper struct for these lets take advantage of the compiler's type
+     * checking.
+     */
+    struct InstRegIndex
+    {
+        RegIndex idx;
+        explicit InstRegIndex(RegIndex _idx) : idx(_idx)
+        {}
+    };
+
+    /**
      * Base class for all X86 static instructions.
      */