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authorNilay Vaish <nilay@cs.wisc.edu>2015-07-28 01:58:04 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-07-28 01:58:04 -0500
commitaafa5c3f86ea54f5e6e88009be656aeec12eef5f (patch)
treed40f2fd8a807ddc9638f292205754f9ecf19b6ef /src/arch/x86/insts
parent608641e23c7f2288810c3f23a1a63790b664f2ab (diff)
downloadgem5-aafa5c3f86ea54f5e6e88009be656aeec12eef5f.tar.xz
revert 5af8f40d8f2c
Diffstat (limited to 'src/arch/x86/insts')
-rw-r--r--src/arch/x86/insts/static_inst.cc7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index 49ea6ef4e..39091289f 100644
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -225,19 +225,12 @@ namespace X86ISA
ccprintf(os, "%%cc%d", rel_reg);
break;
- case VectorRegClass:
- ccprintf(os, "%%cc%d", rel_reg);
- break;
-
case MiscRegClass:
switch (rel_reg) {
default:
ccprintf(os, "%%ctrl%d", rel_reg);
}
break;
-
- default:
- panic("Invalid register class!\n");
}
}