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authorRekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com>2017-04-05 13:14:34 -0500
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-07-05 14:43:49 +0000
commita473b5a6eb269cc303ecfb5e5643d891a5d255d9 (patch)
tree4fde47e5c62c566f81d13f6e90ad98cca781ff6e /src/arch/x86/insts
parent43d833246fcfe092a0c08dde1fdf7e3d409d1af9 (diff)
downloadgem5-a473b5a6eb269cc303ecfb5e5643d891a5d255d9.tar.xz
cpu: Simplify the rename interface and use RegId
With the hierarchical RegId there are a lot of functions that are redundant now. The idea behind the simplification is that instead of having the regId, telling which kind of register read/write/rename/lookup/etc. and then the function panic_if'ing if the regId is not of the appropriate type, we provide an interface that decides what kind of register to read depending on the register type of the given regId. Change-Id: I7d52e9e21fc01205ae365d86921a4ceb67a57178 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2702
Diffstat (limited to 'src/arch/x86/insts')
-rw-r--r--src/arch/x86/insts/microfpop.hh2
-rw-r--r--src/arch/x86/insts/microldstop.hh14
-rw-r--r--src/arch/x86/insts/micromediaop.hh4
-rw-r--r--src/arch/x86/insts/microregop.hh4
-rw-r--r--src/arch/x86/insts/static_inst.cc17
-rw-r--r--src/arch/x86/insts/static_inst.hh6
6 files changed, 20 insertions, 27 deletions
diff --git a/src/arch/x86/insts/microfpop.hh b/src/arch/x86/insts/microfpop.hh
index 04ec285d4..d326b5dfc 100644
--- a/src/arch/x86/insts/microfpop.hh
+++ b/src/arch/x86/insts/microfpop.hh
@@ -66,7 +66,7 @@ namespace X86ISA
OpClass __opClass) :
X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
__opClass),
- src1(_src1.regIdx), src2(_src2.regIdx), dest(_dest.regIdx),
+ src1(_src1.index()), src2(_src2.index()), dest(_dest.index()),
dataSize(_dataSize), spm(_spm)
{}
/*
diff --git a/src/arch/x86/insts/microldstop.hh b/src/arch/x86/insts/microldstop.hh
index e12a51c4c..1d328d1a1 100644
--- a/src/arch/x86/insts/microldstop.hh
+++ b/src/arch/x86/insts/microldstop.hh
@@ -75,12 +75,12 @@ namespace X86ISA
Request::FlagsType _memFlags,
OpClass __opClass) :
X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass),
- scale(_scale), index(_index.regIdx), base(_base.regIdx),
- disp(_disp), segment(_segment.regIdx),
+ scale(_scale), index(_index.index()), base(_base.index()),
+ disp(_disp), segment(_segment.index()),
dataSize(_dataSize), addressSize(_addressSize),
- memFlags(_memFlags | _segment.regIdx)
+ memFlags(_memFlags | _segment.index())
{
- assert(_segment.regIdx < NUM_SEGMENTREGS);
+ assert(_segment.index() < NUM_SEGMENTREGS);
foldOBit =
(dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
foldABit =
@@ -110,7 +110,7 @@ namespace X86ISA
_scale, _index, _base, _disp, _segment,
_dataSize, _addressSize, _memFlags,
__opClass),
- data(_data.regIdx)
+ data(_data.index())
{
}
@@ -143,8 +143,8 @@ namespace X86ISA
_scale, _index, _base, _disp, _segment,
_dataSize, _addressSize, _memFlags,
__opClass),
- dataLow(_dataLow.regIdx),
- dataHi(_dataHi.regIdx)
+ dataLow(_dataLow.index()),
+ dataHi(_dataHi.index())
{
}
diff --git a/src/arch/x86/insts/micromediaop.hh b/src/arch/x86/insts/micromediaop.hh
index 547780108..5cb0bdbb0 100644
--- a/src/arch/x86/insts/micromediaop.hh
+++ b/src/arch/x86/insts/micromediaop.hh
@@ -59,7 +59,7 @@ namespace X86ISA
OpClass __opClass) :
X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
__opClass),
- src1(_src1.regIdx), dest(_dest.regIdx),
+ src1(_src1.index()), dest(_dest.index()),
srcSize(_srcSize), destSize(_destSize), ext(_ext)
{}
@@ -102,7 +102,7 @@ namespace X86ISA
MediaOpBase(_machInst, mnem, _instMnem, setFlags,
_src1, _dest, _srcSize, _destSize, _ext,
__opClass),
- src2(_src2.regIdx)
+ src2(_src2.index())
{}
std::string generateDisassembly(Addr pc,
diff --git a/src/arch/x86/insts/microregop.hh b/src/arch/x86/insts/microregop.hh
index 1accc3555..9838b7cc1 100644
--- a/src/arch/x86/insts/microregop.hh
+++ b/src/arch/x86/insts/microregop.hh
@@ -64,7 +64,7 @@ namespace X86ISA
OpClass __opClass) :
X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
__opClass),
- src1(_src1.regIdx), dest(_dest.regIdx),
+ src1(_src1.index()), dest(_dest.index()),
dataSize(_dataSize), ext(_ext)
{
foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
@@ -90,7 +90,7 @@ namespace X86ISA
RegOpBase(_machInst, mnem, _instMnem, setFlags,
_src1, _dest, _dataSize, _ext,
__opClass),
- src2(_src2.regIdx)
+ src2(_src2.index())
{
}
diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index b9c5486ed..28c268d4e 100644
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -132,10 +132,9 @@ namespace X86ISA
static const char * microFormats[9] =
{"", "t%db", "t%dw", "", "t%dd", "", "", "", "t%d"};
- RegIndex reg_idx = reg.regIdx;
+ RegIndex reg_idx = reg.index();
- switch (reg.regClass) {
- case IntRegClass: {
+ if (reg.isIntReg()) {
const char * suffix = "";
bool fold = reg_idx & IntFoldBit;
reg_idx &= ~IntFoldBit;
@@ -198,10 +197,8 @@ namespace X86ISA
ccprintf(os, microFormats[size], reg_idx - NUM_INTREGS);
}
ccprintf(os, suffix);
- break;
- }
- case FloatRegClass: {
+ } else if (reg.isFloatReg()) {
if (reg_idx < NumMMXRegs) {
ccprintf(os, "%%mmx%d", reg_idx);
return;
@@ -219,19 +216,15 @@ namespace X86ISA
}
reg_idx -= NumMicroFpRegs;
ccprintf(os, "%%st(%d)", reg_idx);
- break;
- }
- case CCRegClass:
+ } else if (reg.isCCReg()) {
ccprintf(os, "%%cc%d", reg_idx);
- break;
- case MiscRegClass:
+ } else if (reg.isMiscReg()) {
switch (reg_idx) {
default:
ccprintf(os, "%%ctrl%d", reg_idx);
}
- break;
}
}
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 0cea0e132..8dac3ec0f 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -107,7 +107,7 @@ namespace X86ISA
inline uint64_t merge(uint64_t into, uint64_t val, int size) const
{
X86IntReg reg = into;
- if (_destRegIdx[0].regIdx & IntFoldBit)
+ if (_destRegIdx[0].index() & IntFoldBit)
{
reg.H = val;
return reg;
@@ -138,7 +138,7 @@ namespace X86ISA
{
X86IntReg reg = from;
DPRINTF(X86, "Picking with size %d\n", size);
- if (_srcRegIdx[idx].regIdx & IntFoldBit)
+ if (_srcRegIdx[idx].index() & IntFoldBit)
return reg.H;
switch(size)
{
@@ -159,7 +159,7 @@ namespace X86ISA
{
X86IntReg reg = from;
DPRINTF(X86, "Picking with size %d\n", size);
- if (_srcRegIdx[idx].regIdx & IntFoldBit)
+ if (_srcRegIdx[idx].index() & IntFoldBit)
return reg.SH;
switch(size)
{