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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:18 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:18 -0800 |
| commit | c41fc138e78420c72d8dada805a16c96f74f631b (patch) | |
| tree | d66a767288ca51f19f143c891ce2b722101bca40 /src/arch/x86/interrupts.cc | |
| parent | 3a2d2223e1debf932a0cec3244e4ce63e5d748af (diff) | |
| download | gem5-c41fc138e78420c72d8dada805a16c96f74f631b.tar.xz | |
dev: fixed bugs to extend interrupt capability beyond 15 cores
Diffstat (limited to 'src/arch/x86/interrupts.cc')
| -rw-r--r-- | src/arch/x86/interrupts.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 9b2d42a16..837c802ec 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -294,7 +294,14 @@ X86ISA::Interrupts::setCPU(BaseCPU * newCPU) void X86ISA::Interrupts::init() { + // + // The local apic must register its address ranges on both its pio port + // via the basicpiodevice(piodevice) init() function and its int port + // that it inherited from IntDev. Note IntDev is not a SimObject itself. + // BasicPioDevice::init(); + IntDev::init(); + Pc * pc = dynamic_cast<Pc *>(platform); assert(pc); pc->southBridge->ioApic->registerLocalApic(initialApicId, this); |