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author | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 09:09:56 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 09:09:56 -0700 |
commit | d9f9c967fbe651e09d444e460a9b1c5a450b1cd2 (patch) | |
tree | ba705f0a9f18e5c96fbec3b4f3691761235be7e2 /src/arch/x86/interrupts.hh | |
parent | c4f1cc3b482311f878be44259125c9a5b90c0569 (diff) | |
download | gem5-d9f9c967fbe651e09d444e460a9b1c5a450b1cd2.tar.xz |
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
Diffstat (limited to 'src/arch/x86/interrupts.hh')
-rw-r--r-- | src/arch/x86/interrupts.hh | 44 |
1 files changed, 42 insertions, 2 deletions
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh index 43675294e..68bb2e07d 100644 --- a/src/arch/x86/interrupts.hh +++ b/src/arch/x86/interrupts.hh @@ -58,17 +58,57 @@ #ifndef __ARCH_X86_INTERRUPTS_HH__ #define __ARCH_X86_INTERRUPTS_HH__ +#include "arch/x86/apicregs.hh" #include "arch/x86/faults.hh" #include "cpu/thread_context.hh" +#include "params/X86LocalApic.hh" +#include "sim/eventq.hh" +#include "sim/sim_object.hh" + +class ThreadContext; namespace X86ISA { -class Interrupts +class Interrupts : public SimObject { + protected: + uint32_t regs[NUM_APIC_REGS]; + + class ApicTimerEvent : public Event + { + public: + ApicTimerEvent() : Event() + {} + + void process() + { + warn("Local APIC timer event doesn't do anything!\n"); + } + }; + + ApicTimerEvent apicTimerEvent; + public: - Interrupts() + typedef X86LocalApicParams Params; + + const Params * + params() const + { + return dynamic_cast<const Params *>(_params); + } + + uint32_t readRegNoEffect(ApicRegIndex reg); + uint32_t readReg(ApicRegIndex miscReg, ThreadContext *tc); + + void setRegNoEffect(ApicRegIndex reg, uint32_t val); + void setReg(ApicRegIndex reg, uint32_t val, ThreadContext *tc); + + Interrupts(Params * p) : SimObject(p) { + //Set the local apic DFR to the flat model. + regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1); + memset(regs, 0, sizeof(regs)); clear_all(); } |