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authorGabe Black <gabeblack@google.com>2019-09-11 14:18:25 -0700
committerGabe Black <gabeblack@google.com>2019-10-12 04:11:57 +0000
commit75b19403a75f35f19773a387b3da698722d26924 (patch)
tree3cadfd51ae7c3edc17f32ba8b41a675ce3c276d1 /src/arch/x86/interrupts.hh
parent6ee86bf497ea87a585fe8e4651760e71244fa2fb (diff)
downloadgem5-75b19403a75f35f19773a387b3da698722d26924.tar.xz
x86: Stop using and delete the x86 IntDevice class.
Most of its functionality has been exported already. This change makes the two classes which were inheriting IntDevice create an IntMasterPort themselves. Change-Id: I73d17cd79cf8252b0e26dd2576f552bf9054adf4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20825 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/x86/interrupts.hh')
-rw-r--r--src/arch/x86/interrupts.hh7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh
index e48fd4bb3..a6364c8b1 100644
--- a/src/arch/x86/interrupts.hh
+++ b/src/arch/x86/interrupts.hh
@@ -72,7 +72,7 @@ namespace X86ISA {
ApicRegIndex decodeAddr(Addr paddr);
-class Interrupts : public PioDevice, IntDevice
+class Interrupts : public PioDevice
{
protected:
// Storage for the APIC registers
@@ -171,8 +171,9 @@ class Interrupts : public PioDevice, IntDevice
int initialApicId;
- // Port for receiving interrupts
+ // Ports for interrupts.
IntSlavePort<Interrupts> intSlavePort;
+ IntMasterPort<Interrupts> intMasterPort;
Tick pioDelay;
Addr pioAddr = MaxAddr;
@@ -205,7 +206,7 @@ class Interrupts : public PioDevice, IntDevice
Tick read(PacketPtr pkt) override;
Tick write(PacketPtr pkt) override;
Tick recvMessage(PacketPtr pkt);
- bool recvResponse(PacketPtr pkt) override;
+ bool recvResponse(PacketPtr pkt);
bool
triggerTimerInterrupt()