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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-17 00:29:42 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-17 00:29:42 -0700 |
| commit | df378285f8e2aaf8e1a1bd54f862ed7c7a073e28 (patch) | |
| tree | a1b329e2b480c008e539ab3d432a151c3ab5a514 /src/arch/x86/intregs.hh | |
| parent | e557b4beb570c2019d01da6cb1036dad5853cb60 (diff) | |
| download | gem5-df378285f8e2aaf8e1a1bd54f862ed7c7a073e28.tar.xz | |
X86: Shift some register flattening work into the decoder.
Diffstat (limited to 'src/arch/x86/intregs.hh')
| -rw-r--r-- | src/arch/x86/intregs.hh | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/x86/intregs.hh b/src/arch/x86/intregs.hh index 6f252392e..627d7062f 100644 --- a/src/arch/x86/intregs.hh +++ b/src/arch/x86/intregs.hh @@ -60,6 +60,8 @@ #include "arch/x86/x86_traits.hh" #include "base/bitunion.hh" +#include "base/misc.hh" +#include "sim/core.hh" namespace X86ISA { @@ -187,7 +189,9 @@ namespace X86ISA inline static IntRegIndex INTREG_FOLDED(int index, int foldBit) { - return (IntRegIndex)(((index & 0x1C) == 4 ? foldBit : 0) | index); + if ((index & 0x1C) == 4 && foldBit) + index = (index - 4) | foldBit; + return (IntRegIndex)index; } }; |