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authorGabe Black <gblack@eecs.umich.edu>2009-07-09 20:29:02 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-09 20:29:02 -0700
commit9993ca8280b03a390d860b9dfb6597c7ecc98a27 (patch)
treee9467da7e824e12d4761114c373e88294734ad66 /src/arch/x86/isa.hh
parent60d47aa5f9018bf29651ec33ae1f20793fcdc4eb (diff)
downloadgem5-9993ca8280b03a390d860b9dfb6597c7ecc98a27.tar.xz
X86: Fold the MiscRegFile all the way into the ISA object.
Diffstat (limited to 'src/arch/x86/isa.hh')
-rw-r--r--src/arch/x86/isa.hh23
1 files changed, 17 insertions, 6 deletions
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 5b120d69e..285f0aa82 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -31,28 +31,39 @@
#ifndef __ARCH_X86_ISA_HH__
#define __ARCH_X86_ISA_HH__
-#include "arch/x86/miscregfile.hh"
-#include "arch/x86/types.hh"
+#include "arch/x86/miscregs.hh"
+#include "arch/x86/registers.hh"
+#include "base/types.hh"
+
+#include <string>
+#include <iostream>
class Checkpoint;
class EventManager;
+class ThreadContext;
namespace X86ISA
{
class ISA
{
protected:
- MiscRegFile miscRegFile;
+ MiscReg regVal[NUM_MISCREGS];
+ void updateHandyM5Reg(Efer efer, CR0 cr0,
+ SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags);
public:
void clear();
+ ISA()
+ {
+ clear();
+ }
+
MiscReg readMiscRegNoEffect(int miscReg);
MiscReg readMiscReg(int miscReg, ThreadContext *tc);
- void setMiscRegNoEffect(int miscReg, const MiscReg val);
- void setMiscReg(int miscReg, const MiscReg val,
- ThreadContext *tc);
+ void setMiscRegNoEffect(int miscReg, MiscReg val);
+ void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
int flattenIntIndex(int reg);
int flattenFloatIndex(int reg);