cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.

1 files changed, 6 insertions, 0 deletions

diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh
index 88f4980ae..779241c55 100644
--- a/src/arch/x86/isa.hh
+++ b/src/arch/x86/isa.hh
@@ -92,6 +92,12 @@ namespace X86ISA
         }
 
         int
+        flattenVectorIndex(int reg) const
+        {
+            return reg;
+        }
+
+        int
         flattenMiscIndex(int reg) const
         {
             return reg;