diff options
| author | Gabe Black <gabeblack@google.com> | 2018-11-20 16:58:19 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-01-31 11:04:13 +0000 |
| commit | b859a7030d883cc208347387b19285c53b64fb54 (patch) | |
| tree | 3b70cba6c8c102bb07476ee69b0ce38ca6f86a09 /src/arch/x86/isa.hh | |
| parent | ad775e013572aeb06ccff949dfd2cf7fffb5454f (diff) | |
| download | gem5-b859a7030d883cc208347387b19285c53b64fb54.tar.xz | |
x86: Stop using/defining some ISA specific register types.
These have been replaced with the generic RegVal type.
Change-Id: I75c1134212067dea43aa0903d813633e06f3d6c6
Reviewed-on: https://gem5-review.googlesource.com/c/14476
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/x86/isa.hh')
| -rw-r--r-- | src/arch/x86/isa.hh | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh index 7ad464643..a835a794a 100644 --- a/src/arch/x86/isa.hh +++ b/src/arch/x86/isa.hh @@ -51,7 +51,7 @@ namespace X86ISA class ISA : public SimObject { protected: - MiscReg regVal[NUM_MISCREGS]; + RegVal regVal[NUM_MISCREGS]; void updateHandyM5Reg(Efer efer, CR0 cr0, SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags, ThreadContext *tc); @@ -64,11 +64,11 @@ namespace X86ISA ISA(Params *p); const Params *params() const; - MiscReg readMiscRegNoEffect(int miscReg) const; - MiscReg readMiscReg(int miscReg, ThreadContext *tc); + RegVal readMiscRegNoEffect(int miscReg) const; + RegVal readMiscReg(int miscReg, ThreadContext *tc); - void setMiscRegNoEffect(int miscReg, MiscReg val); - void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc); + void setMiscRegNoEffect(int miscReg, RegVal val); + void setMiscReg(int miscReg, RegVal val, ThreadContext *tc); RegId flattenRegId(const RegId& regId) const |