x86: decode instructions with vex prefix

This patch updates the x86 decoder so that it can decode instructions with vex
prefix. It also updates the isa with opcodes from vex opcode maps 1, 2 and 3.
Note that none of the instructions have been implemented yet. The
implementations would be provided in due course of time.

1 files changed, 9 insertions, 0 deletions

diff --git a/src/arch/x86/isa/bitfields.isa b/src/arch/x86/isa/bitfields.isa
index e2751a8ef..b5121f4e3 100644
--- a/src/arch/x86/isa/bitfields.isa
+++ b/src/arch/x86/isa/bitfields.isa
@@ -87,3 +87,12 @@ def bitfield STACKSIZE stackSize;
 def bitfield MODE mode;
 def bitfield MODE_MODE mode.mode;
 def bitfield MODE_SUBMODE mode.submode;
+
+def bitfield VEX_R vex.first.r;
+def bitfield VEX_X vex.first.x;
+def bitfield VEX_B vex.first.b;
+def bitfield VEX_MAP vex.first.map_select;
+def bitfield VEX_W vex.second.w;
+def bitfield VEX_VVVV vex.second.vvvv;
+def bitfield VEX_L vex.second.l;
+def bitfield VEX_PP vex.second.pp;