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authorGabe Black <gblack@eecs.umich.edu>2007-03-21 19:19:53 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-21 19:19:53 +0000
commit0a80d06deaaf6fc574abacc2fed9b74d0bca1085 (patch)
tree070b5addf386a199fb9837c07eabe85191b5d3ba /src/arch/x86/isa/bitfields.isa
parent3efec59fc55a439353adbd859722d8a5d170c18d (diff)
downloadgem5-0a80d06deaaf6fc574abacc2fed9b74d0bca1085.tar.xz
Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
--HG-- extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
Diffstat (limited to 'src/arch/x86/isa/bitfields.isa')
-rw-r--r--src/arch/x86/isa/bitfields.isa27
1 files changed, 26 insertions, 1 deletions
diff --git a/src/arch/x86/isa/bitfields.isa b/src/arch/x86/isa/bitfields.isa
index 47aec4fa1..fff324caa 100644
--- a/src/arch/x86/isa/bitfields.isa
+++ b/src/arch/x86/isa/bitfields.isa
@@ -58,5 +58,30 @@
// Bitfield definitions.
//
-def bitfield EXAMPLE <24>;
+//Prefixes
+def bitfield REX rex;
+def bitfield LEGACY legacy;
+// Pieces of the opcode
+def bitfield OPCODE_NUM opcode.num;
+def bitfield OPCODE_PREFIXA opcode.prefixA;
+def bitfield OPCODE_PREFIXB opcode.prefixB;
+def bitfield OPCODE_OP opcode.op;
+//The top 5 bits of the opcode tend to split the instructions into groups
+def bitfield OPCODE_OP_TOP5 opcode.op.top5;
+def bitfield OPCODE_OP_BOTTOM3 opcode.op.bottom3;
+
+// Immediate fields
+def bitfield IMMEDIATE immediate;
+def bitfield DISPLACEMENT displacement;
+
+//Modifier bytes
+def bitfield MODRM modRM;
+def bitfield MODRM_MOD modRM.mod;
+def bitfield MODRM_REG modRM.reg;
+def bitfield MODRM_RM modRM.rm;
+
+def bitfield SIB sib;
+def bitfield SIB_SCALE sib.scale;
+def bitfield SIB_INDEX sib.index;
+def bitfield SIB_BASE sib.base;