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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-24 15:43:38 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-24 15:43:38 -0700 |
commit | 02c39000bfc6be620382bf89636e3b1bbb2f4cf6 (patch) | |
tree | 41d8ceef3e10ec6dba5128f71a6c58e8786a4024 /src/arch/x86/isa/decoder/one_byte_opcodes.isa | |
parent | 93365f7d1ad8f7ad910e4d94e12a80ec7a91a7d0 (diff) | |
download | gem5-02c39000bfc6be620382bf89636e3b1bbb2f4cf6.tar.xz |
Hook in a bunch of new instructions, fix a few minor bugs, and expand out one of the prefix multiplexed opcode groups.
--HG--
extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
Diffstat (limited to 'src/arch/x86/isa/decoder/one_byte_opcodes.isa')
-rw-r--r-- | src/arch/x86/isa/decoder/one_byte_opcodes.isa | 41 |
1 files changed, 33 insertions, 8 deletions
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index bf19ed78e..c81aa666d 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -305,8 +305,8 @@ default: xchg_B_rAX(); } 0x13: decode OPCODE_OP_BOTTOM3 { - 0x0: cbw_or_cwde_or_cdqe_rAX(); - 0x1: cwd_or_cdq_or_cqo_rAX_rDX(); + 0x0: Inst::CDQE(rAv); + 0x1: Inst::CQO(rAv,rDv); 0x2: decode MODE_SUBMODE { 0x0: Inst::UD2(); default: call_far_Ap(); @@ -409,8 +409,33 @@ 0x1A: decode OPCODE_OP_BOTTOM3 { 0x0: group2_Eb_1(); 0x1: group2_Ev_1(); - 0x2: group2_Eb_Cl(); - 0x3: group2_Ev_Cl(); + format Inst { + //0x2: group2_Eb_Cl(); + 0x2: decode MODRM_REG { + 0x0: ROL(Eb,rCb); + 0x1: ROR(Eb,rCb); + 0x2: RCL(Eb,rCb); + 0x3: RCR(Eb,rCb); + 0x4: SAL(Eb,rCb); + 0x5: SHR(Eb,rCb); + 0x6: SAL(Eb,rCb); + 0x7: SAR(Eb,rCb); + } + //The second operand should have size "b", but to have + //consistent register sizes it's "v". This shouldn't have + //any affect on functionality. + //0x3: group2_Ev_Cl(); + 0x3: decode MODRM_REG { + 0x0: ROL(Ev,rCv); + 0x1: ROR(Ev,rCv); + 0x2: RCL(Ev,rCv); + 0x3: RCR(Ev,rCv); + 0x4: SAL(Ev,rCv); + 0x5: SHR(Ev,rCv); + 0x6: SAL(Ev,rCv); + 0x7: SAR(Ev,rCv); + } + } 0x4: decode MODE_SUBMODE { 0x0: Inst::UD2(); default: aam_Ib(); @@ -470,8 +495,8 @@ 0x5: cmc(); //0x6: group3_Eb(); 0x6: decode MODRM_REG { - 0x0: test_Eb_Iz(); - 0x1: test_Eb_Iz(); + 0x0: Inst::TEST(Eb,Iz); + 0x1: Inst::TEST(Eb,Iz); 0x2: not_Eb(); 0x3: Inst::NEG(Eb); 0x4: mul_Eb(); @@ -481,8 +506,8 @@ } //0x7: group3_Ev(); 0x7: decode MODRM_REG { - 0x0: test_Ev_Iz(); - 0x1: test_Ev_Iz(); + 0x0: Inst::TEST(Ev,Iz); + 0x1: Inst::TEST(Ev,Iz); 0x2: not_Ev(); 0x3: Inst::NEG(Ev); 0x4: mul_Ev(); |