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author | Steve Reinhardt <stever@gmail.com> | 2008-02-27 18:18:56 -0500 |
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committer | Steve Reinhardt <stever@gmail.com> | 2008-02-27 18:18:56 -0500 |
commit | 19dfde231764855df58c2ac183c012953daa32c6 (patch) | |
tree | 5d03d25a5e3c9b3b687bac0eb53fc6e19c5e1e67 /src/arch/x86/isa/decoder/two_byte_opcodes.isa | |
parent | 2f41006e448a6af11dcf36b7804edd91c7710bda (diff) | |
parent | 8fb74c238cbf7a394d5d547dea987e35eddfca79 (diff) | |
download | gem5-19dfde231764855df58c2ac183c012953daa32c6.tar.xz |
Automated merge with ssh://daystrom.m5sim.org//repo/m5
--HG--
extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
Diffstat (limited to 'src/arch/x86/isa/decoder/two_byte_opcodes.isa')
-rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index d90df6f45..8135a1fdb 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -157,7 +157,7 @@ } 0x4: smsw_Mw(); 0x6: lmsw_Mw(); - 0x7: invlpg_M(); + 0x7: Inst::INVLPG(M); default: Inst::UD2(); } } |