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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:17:14 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:17:14 -0700 |
| commit | d86cd1d2a02d2dd42e6b0f6e8bc8b8876c3d6152 (patch) | |
| tree | aaa3dfcc6a6284a2f2a0fc8e0d1b5a106c616d56 /src/arch/x86/isa/decoder/two_byte_opcodes.isa | |
| parent | b4ad233c0c4aeb4f622a87ff6f7e5c4f072a2927 (diff) | |
| download | gem5-d86cd1d2a02d2dd42e6b0f6e8bc8b8876c3d6152.tar.xz | |
X86: Implement the load machine status word instruction (LMSW).
Diffstat (limited to 'src/arch/x86/isa/decoder/two_byte_opcodes.isa')
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 0f6d59f3d..e55756fec 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -126,7 +126,7 @@ 0x7: invlpga(); } 0x4: smsw_Rv(); - 0x6: lmsw_Rv(); + 0x6: Inst::LMSW(Rv); 0x7: decode MODRM_RM { 0x0: Inst::SWAPGS(); 0x1: rdtscp(); @@ -156,7 +156,7 @@ } } 0x4: smsw_Mw(); - 0x6: lmsw_Mw(); + 0x6: Inst::LMSW(Mw); 0x7: Inst::INVLPG(M); default: Inst::UD2(); } |