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author | Tao Zhang <tao.zhang.0924@gmail.com> | 2013-01-08 08:54:11 -0500 |
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committer | Tao Zhang <tao.zhang.0924@gmail.com> | 2013-01-08 08:54:11 -0500 |
commit | 858d99b7cc6515aa6a0e75859aa7b5f460b40bb7 (patch) | |
tree | 09b76b831047c8565161f89c82cc14c63df79c81 /src/arch/x86/isa/decoder/two_byte_opcodes.isa | |
parent | 4a752b1655c531a2fd7d98dbe24239fed5261291 (diff) | |
download | gem5-858d99b7cc6515aa6a0e75859aa7b5f460b40bb7.tar.xz |
sim: Fix early termination in multi-core simulation under SE mode.
When "-I" (maximum instruction number) and "-F" (fastforward instruction
number) are applied together, gem5 immediately exits after the cpu switching.
The reason is that multiple exit events may be generated in the same cycle by
Atomic CPU and inserted to mainEventQueue. However, mainEventQueue can only
serve one exit event in one cycle. Therefore, the rest exit events are left in
mainEventQueue without being descheduled or deleted, which causes gem5 exits
immediately after the system resumes by cpu switching.
Diffstat (limited to 'src/arch/x86/isa/decoder/two_byte_opcodes.isa')
0 files changed, 0 insertions, 0 deletions