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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:19:22 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:19:22 -0800
commit06ff83e1b9aa2a00af4f66fae7c9fce2ac36394a (patch)
tree4d2425e0bef378810dce205b11f3389f7d15eebb /src/arch/x86/isa/decoder
parent5f0428ef9fc7acc5b1315f6c87202c1ee13f0b8b (diff)
downloadgem5-06ff83e1b9aa2a00af4f66fae7c9fce2ac36394a.tar.xz
X86: Implement a basic prefetch instruction.
Diffstat (limited to 'src/arch/x86/isa/decoder')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index fa49c55d3..a0a08df8f 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -281,7 +281,7 @@
0x2: Inst::UD2();
0x3: Inst::UD2();
0x4: Inst::UD2();
- 0x5: prefetch();
+ 0x5: Inst::PREFETCH(Mb);
0x6: FailUnimpl::femms();
0x7: FailUnimpl::threednow();
}
@@ -335,7 +335,7 @@
//group17();
0x0: decode MODRM_REG {
0x0: prefetch_nta();
- 0x1: prefetch_t0();
+ 0x1: Inst::PREFETCH_T0(Mb);
0x2: prefetch_t1();
0x3: prefetch_t2();
default: Inst::HINT_NOP();