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authorMarc Orr <marc.orr@gmail.com>2012-05-19 04:32:25 -0700
committerMarc Orr <marc.orr@gmail.com>2012-05-19 04:32:25 -0700
commit16a559c9c66b3e810860b59c4099527b38a5337e (patch)
tree959671bca23e7951e2ff05cba70bc91e73470c61 /src/arch/x86/isa/decoder
parent250c40799dd5e3bf1d7ebead8ddd894b8cb8c528 (diff)
downloadgem5-16a559c9c66b3e810860b59c4099527b38a5337e.tar.xz
x86 ISA: Implement the sse3 haddps instruction.
Shuffle the 32 bit values into position, and then add in parallel.
Diffstat (limited to 'src/arch/x86/isa/decoder')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 378d426e3..34b79a6a4 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -669,7 +669,7 @@
}
// repne (0xF2)
0x8: decode OPCODE_OP_BOTTOM3 {
- 0x4: WarnUnimpl::haddps_Vo_Wo();
+ 0x4: HADDPS(Vo,Wo);
0x5: WarnUnimpl::hsubps_Vo_Wo();
default: UD2();
}